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LTC2936CUFD#TRPBF

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30
LTC2936
10
2936fa
For more information www.linear.com/LTC2936
operaTion
I
2
C Serial Digital Interface
The LTC2936 communicates with a host (master) using
the I
2
C serial bus interface. The Timing Diagram shows
the timing relationship of the signals on the bus. The two
bus lines, SDA and SCL, must be high when the bus is
not in use. External pull-up resistors or current sources
are required on these lines.
The LTC2936 is a transmit/receive slave only device. The
master device must initiate data transfer on the bus by
generating SCL to allow the transfer. In the event of an
OV/UV fault, the LTC2936 can be configured to assert the
ALERT output low in order to notify the host.
Slave Address
The LTC2936 can respond to one of 9 addresses. By con
-
necting the address ASEL0 and ASEL1 inputs to V
DD33
,
GND, or by floating them, the slave address is determined
as shown in the following table. The LTC2936 always
responds to the special addresses.
LTC2936 Address Look-Up Table
ASEL0 0 Hi-Z 1 0 Hi-Z 1 0 Hi-Z 1
ASEL1 0 0 0 Hi-Z Hi-Z Hi-Z 1 1 1
7-Bit Address 0x50 0x51 0x52 0x53 0x54 0x55 0x58 0x59 0x5A
8-Bit Address 0xA0 0xA2 0xA4 0xA6 0xA8 0xAA 0xB0 0xB2 0xB4
LTC2936 Special Slave Addresses
7-BIT ADDRESS 8-BIT ADDRESS DESCRIPTION
0x0C 0x19 Alert Response Address, Independent of the ASEL pin.
0x73 0xE6 Global address to which all LTC2936's will respond. Independent of the ASEL pin.
SLAVE ADDRESS Wr A A PS
7 81 1 1 11
COMMAND CODE
SLAVE ADDRESS COMMAND CODE DATA BYTE LOWWr A A A PS
7 8 8 1
DATA BYTE HIGH
81 1 1 1 11
A
SLAVE ADDRESS COMMAND CODE SLAVE ADDRESSWr A A A P
2936 F00
S
7 8 7 1
DATA BYTE LOW
8
DATA BYTE HIGH
811 1 1
Sr
1 1 11
A
1
Rd A
Communication Protocols
Send Byte Format
Write Word Format
Read Word Format
S
Sr
Rd
Wr
A
A
P
START CONDITION
REPEATED START CONDITION
READ (BIT VALUE OF 1)
WRITE (BIT VALUE OF 0)
ACKNOWLEDGE
NOT ACKNOWLEDGE
STOP CONDITION
MASTER TO SLAVE
SLAVE TO MASTER
LTC2936
11
2936fa
For more information www.linear.com/LTC2936
operaTion
Register Command Set
COMMAND
FUNCTION DESCRIPTION
R/W/S
(See Note)
DATA LENGTH
(BITS)
COMMAND
BYTE DEFAULT VALUE
WRITE_PROTECT Contains lock key code and write lock. R/W 16 0x00 1010_1010_1010_1000b
GPI_CONFIG Configure GPI2 and GPI1 assignment, GPIOn mapping
and MR internal response.
R/W 16 0x01 X001_0000_X000_0000b
GPIO1_CONFIG
Configure GPIO1 type, delay-on-release and mapping to
GPIO2, GPIO3.
R/W 16 0x02 X000_0000_0010_1011b
GPIO2_3_CONFIG
Configure GPIO3 type, delay-on-release and mapping
to GPIO1 and GPIO2. Configure GPIO2 type, delay-on-
release and mapping to GPIO1 and GPIO3.
R/W 16 0x03 0010_1011_0010_1011b
V1_THR Encode high and low voltage thresholds on channel V1. R/W 16 0x04 1110_0110_1011_0100b
V2_THR Encode high and low voltage thresholds on channel V2. R/W 16 0x05 1000_1001_0110_1000b
V3_THR Encode high and low voltage thresholds on channel V3. R/W 16 0x06 0101_1101_0100_0100b
V4_THR Encode high and low voltage thresholds on channel V4. R/W 16 0x07 1001_1001_0111_0101b
V5_THR Encode high and low voltage thresholds on channel V5 R/W 16 0x08 0111_1000_0101_1010b
V6_THR Encode high and low voltage thresholds on channel V6. R/W 16 0x09 0101_0111_0011_1111b
V1_CONFIG Encode comparator range, polarity and GPIO
n
mapping. R/W 16 0x0A XXX0_1100_1000_1001b
V2_CONFIG Encode comparator range, polarity and GPIO
n
mapping. R/W 16 0x0B XXX0_1100_1000_1001b
V3_CONFIG Encode comparator range, polarity and GPIO
n
mapping. R/W 16 0x0C XXX0_1100_1000_1001b
V4_CONFIG Encode comparator range, polarity and GPIO
n
mapping. R/W 16 0x0D XXX0_1101_1000_1001b
V5_CONFIG Encode comparator range, polarity and GPIO
n
mapping. R/W 16 0x0E XXX0_1101_1000_1001b
V6_CONFIG Encode comparator range, polarity and GPIO
n
mapping. R/W 16 0x0F XXX0_1101_1000_1001b
HISTORY_WORD Read the fault history. Read only. R 16 0x11 NA
PADS Return the status of the GPIn, GPIOn and CMPn pins. R 16 0x1A NA
CLEAR_HISTORY
Clear volatile memory history register. Write only.
S 0 0x1B NA
STORE_USER
Store volatile memory to EEPROM. Write only.
S 0 0x1C NA
RESTORE_USER Restore volatile memory from EEPROM. Write only. S 0 0x1D NA
BACKUP_WORD Read the EEPROM backup of the first fault history.
Read only.
R 16 0x1E NA
STATUS_WORD
Read the fault status. Read only. R 16 0x1F NA
Note: R = Read, W = Write, S = Send Byte.
LTC2936
12
2936fa
For more information www.linear.com/LTC2936
operaTion
DETAILED COMMAND REGISTER DESCRIPTIONS
WRITE_PROTECT (Command Byte 0x00)
The WRITE_PROTECT command provides the ability to
prevent any write operations into the volatile memory, if
WRITE_LOCK = 1. KEY may be changed when WRITE_LOCK
= 0, or in the same command that sets WRITE_LOCK = 1.
WRITE_PROTECT Data Contents
BIT(S) SYMBOL PURPOSE
b[15:2] KEY Must match against programmed combination in order to deactivate write lock.
Factory default 10_1010_1010_1010b (0x2AAA).
b[1]
Reserved Ignore
b[0] WRITE_LOCK 0: Unlocked. Writes to volatile memory are permitted.
1: Locked. Writing to volatile memory is not permitted. To unlock, set WRITE_LOCK = 0 with the
appropriate key. If a GPI
n
input is configured for WP, and is low, then reading WRITE_PROTECT will
always return WRITE_LOCK = 1.
Factory default 0.
When locked, WRITE_LOCK can only be written to 0 if
KEY matches the existing value in memory. For effective
protection against false writes, KEY should contain at
least one bit set to 1.
Writes to supported commands are ignored when
WRITE_LOCK = 1 or when a GPIn input configured for
WP is held low. All commands may be read regardless of
the WRITE_LOCK bit setting.
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30

LTC2936CUFD#TRPBF

Mfr. #:
Buy LTC2936CUFD#TRPBF
Manufacturer:
Analog Devices Inc.
Description:
Supervisory Circuits Programmable Hex Voltage Supervisor (w/ Comparator Outputs)
Lifecycle:
New from this manufacturer.
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