UG-546 Evaluation Board User Guide
Rev. 0 | Page 4 of 8
DATA I/O STRUCTURES
Each data channel has a variety of structures to help configure,
load, and monitor both the input and output. Figure 3 shows one
of the datapaths from an external connection to the DUT pin.
Each channel has similar connections.
Starting at the external connection, the signal path is
1. A pad layout for a PCB board edge-mounted SMA
connector.
2. Two 0805 pads are provided where 100 Ω resistors to
ground can be installed. The combined resistance is 50 Ω
to provide a termination for a standard coaxial cable.
3. A standard 0805 pad layout that allows the coaxial and
termination structures to be connected to the rest of the
signal path.
4. A 0605 pad layout between the signal path and V
DDx
can be
used for installing a pull-up resistor.
5. A populated 2-pin header provides a signal ground pair
that can be used for clip leads or for shorting a channel to
ground temporarily.
6. There is a grouping of three open through holes, consisting
of a signal and two ground connections. This can be used for
hardwiring signal wires into the PCB, installing a header to
accept a Tektronix active probe, or installing a 2-pin header
to allow adjacent channels to temporarily be shorted together.
7. A 0805 pad layout between the signal and ground where a
load capacitor or resistor can be installed.
8. Pads to the adjacent channels are provided to allow permanent
connection of adjacent channels. Inputs can be fanned out
to several channels, or inputs and outputs can be connected
together to allow signals to loopback.
Figure 2 shows many of the optional components installed, as well
as how jumpers can be used to temporarily connect channels.
This figure shows a signal connected to the first channel SMA
and then fanned out to the top three channels and monitored by
an active scope probe.
BYPASS ON THE PCB
Several positions and structures are provided to allow optimum
bypass of the evaluation board. Provision has been made for
optional surface-mount bulk capacitors to be installed near the
power connectors to compensate for long cables to the power
supply. Parallel bypass capacitors are installed near the ADuM3481
and consist of a 0.1 µF capacitor for each V
DDx
, V
DDCx
, and V
DDLx
on the top side and a 0.1 µF capacitor for each V
DDx
,V
DDCx
, and
V
DDLx
on the bottom side of the board. It is best to use the top
side bypass positions if possible.
The PCB also implements a distributed capacitive bypass on the
PCB. This consists of power and ground planes closely spaced
on the inner layers of the PCB. This minimizes noise and the
transmission of EMI without using complex design features.
HIGH VOLTAGE CAPABILITY
This PCB is designed in adherence with 2500 V basic insulation
practices. High voltage testing beyond 2500 V is not recommended.
Appropriate care must be taken when using this evaluation board
at high voltages, and the PCB should not be relied on for safety
functions because it has not been high potential tested (also
known as hipot tested or dielectric withstanding voltage tested)
or certified for safety.
11404-004
1 SMA CONNECTOR PADS
2 TERMINATION
2 × 100Ω
5 2-PIN HEADER
GND/SIGNAL
4 PULL-UP
PAD
7 PULL-DOWN
PAD
3 CONNECT
TO SMA
8 CONNECT TO
NEXT CHANNEL UP
8 CONNECT TO
NEXT CHANNEL DOWN
6 OPEN HOLES FOR
SOLDERED WIRES OR 200mil
TEKTRONIX HEADER,
GND/GND/SIGNAL
NOTES
1. THE NUMBERED COMPONENTS IN THIS FIGURE CORRESPOND
TO THE DESCRIPTIONS IN THE DATA I/O STRUCTURES SECTION.
Figure 3. Configuration and Monitoring Structures (Showing a Datapath from an External Connection to the DUT Pin)
