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NJW1112V-TE1

P1-P3P4-P6P7-P9P10-P12P13-P13
NJW1112
– 4 –
Ver.0.2
TERMINAL DESCRIPTION
PIN NO. SYMBOL FUNCTION EQUIVALENT CIRCUIT
TERMINAL
DC
VOLTAGE
1 to 16
InA1 to 8
InB1 to 8
Ach Input 1 to 8
Bch Input 1 to 8
0V
17 to 24
OutA1 to 4
OutB1 to 4
Ach Output 1 to 4
Bch Output 1 to 4
0V
27 V
+
V+ Power Supply Terminal
V+
26 GND Ground Terminal
0V
28
29
30
31
ADR
CLOCK
LATCH
DATA
Chip address setting terminal
CLOCK
LATCH
DATA
0V
V-(sub)
200
Ω
V+
V-(sub)
V+
V+
50
Ω
50
Ω
V-(sub)
V-(sub)
V+
V-(sub)
4k
Ω
8k
Ω
V+
NJW1112
– 5 –
Ver.0.2
TERMINAL DESCRIPTION
PIN NO. SYMBOL FUNCTION EQUIVALENT CIRCUIT
TERMINAL
DC
VOLTAGE
32 VDDOUT
Internal Digital Power Supply
Output
V-(sub)+5V
V-(sub)
V+
70k
Ω
25k
Ω
200
Ω
20k
Ω
V-(sub)
NJW1112
– 6 –
Ver.0.2
CONTROL DATA FORMAT
(
7
)
MSB First
Note.) Set CLOCK in High to prevent incorrect operation during a standby period.
SYMBOL PARAMETER MIN TYP MAX UNIT
t1
CLOCK Clock Width
4 - -
µsec
t2
CLOCK Pulse Width (High)
2 - -
µsec
t3
CLOCK Pulse Width (Low)
2 - -
µsec
t4
LATCH Rise Hold Time
4 - -
µsec
t5
DATA Setup Time
1.6 - -
µsec
t6
DATA Hold Time
1.6 - -
µsec
t7
CLOCK Setup Time
1.6 - -
µsec
t8
LATCH High Pulse Width
1.6 - -
µsec
CONTROL DATA
NJW1112 control data is constructed with 16bits.
MSB LSB
D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
Setting DATA Select Address Chip Address
MSB
D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
Don’t Care OutSW1
Selector1
0 0 0 0 * * * *
Don’t Care OutSW2
Selector2
0 0 0 1 * * * *
Don’t Care OutSW3
Selector3
0 0 1 0 * * * *
Don’t Care OutSW4
Selector4
0 0 1 1 * * * *
LSB
* Chip address is set by chip address select terminal (ADR) status.
Chip address
ADR D3 D2 D1 D0
Low 1 0 1 0
High 1 0 1 1
LATCH
DAT
A
CLOCK
D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
MSB LSB
t7 t1
t2 t3
t4 t8
t5 t6
P1-P3P4-P6P7-P9P10-P12P13-P13

NJW1112V-TE1

Mfr. #:
Buy NJW1112V-TE1
Manufacturer:
Description:
IC AUDIO SIGNAL PROCESSOR 32SSOP
Lifecycle:
New from this manufacturer.
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