MAX5003
It also determines power-up sequencing when several
converters are used.
Upon power turn-on, the SS pin acts as a current sink
to reset any capacitance attached to it. Once REF has
exceeded its lockout value, SS sources a current to the
external capacitor, allowing the converter output volt-
age to ramp up. Full output voltage is reached in
approximately 0.45s/µF.
The SS pin is an overriding extra input to the PWM
comparator. As long as its voltage is lower than V
CON
,
it overrides V
CON
and SS determines the level at which
the duty cycle is decided by the PWM comparator.
After exceeding V
CON
, SS no longer controls the duty
cycle. Its voltage will keep rising up to V
CC
.
Oscillator and Ramp Generator
The MAX5003 oscillator generates the ramp used by
the comparator, which in turn generates the PWM digi-
tal signal. It also controls the maximum on-time feature
of the controller. The oscillator can operate in two
modes: free running and synchronized (sync). A single
pin, FREQ, doubles as the attachment point for the fre-
quency programming resistor and as the synchroniza-
tion input. The mode recognition is automatic, based on
the voltage level at the FREQ pin.
In free-running mode, a 1.25V source is internally
applied to the pin; the oscillator frequency is propor-
tional to the current out of the pin through the program-
ming resistor, with a proportionality constant of
16kHz/µA.
In sync mode, the signal from the external master gen-
erator must be a digital rectangular waveform running
at four times the desired converter switching frequency.
Minimum acceptable signal pulse width is 150ns, posi-
tive or negative, and the maximum frequency is
1.2MHz.
When the voltage at FREQ is forced above 2.7V, the
oscillator goes into sync mode. If left at or below 1.5V for
more than 8µs to 20µs, it enters free-running mode.
The master clock generator cannot be allowed to stop
at logic zero. If the system design forces such a situa-
tion, an inverter must be used at the FREQ pin.
In sync mode, the oscillator signal is divided by four and
decoded. The output driver is blocked during the last
phase of the division cycle, giving a hardwired maximum
on-time of 75%. In free-running mode, the oscillator duty
cycle is 75% on, and the off portion also blocks the out-
put driver. The maximum on-time is then absolutely limit-
ed to 75% in either mode. Maximum on-time can be
controlled to values lower than 75% by a programming
resistor at the MAXTON pin.
The PWM ramp generated goes from 0.5V min to 2.5V
max, and the maximum time on is the time it takes from
low to high.
MAXTON is internally driven to V
INDIV
and a resistor
must be connected from MAXTON to AGND, to pro-
gram the maximum on-time.
The ramp slope is directly proportional to V
INDIV
and
inversely proportional to R
MAXTON
. Since the ramp volt-
age limits are fixed, controlling the ramp slope sets the
maximum time on.
Changing the ramp slope while V
CON
remains constant
also changes the duty cycle and the energy transferred to
the load per cycle of the converter. The INDIV signal is a
fraction of the input voltage, so the fast input voltage feed-
forward works by modifying the duty cycle in the same
clock period, in response to an input voltage change.
Calculate the maximum duty cycle as:
where:
D
MAX
= Maximum duty cycle (%)
MAXTON = Maximum on-time
T = Switching period
Then:
where:
R
MAXTON
= Resistor from the MAXTON pin to ground
V
INDIV
= Voltage at the INDIV pin
ƒ
SW
= Output switching frequency
MAXTON can then be calculated as:
N-Channel MOSFET
Output Switch Driver
The MAX5003 output drives an N-channel MOSFET
transistor. The output sources and sinks relatively large
currents, supplying the gate with the charge the tran-
sistor needs to switch. These are current spikes only,
since after the switching transient is completed the load
is a high-value resistance. The current is supplied from
the V
CC
rail and must be sourced by a large-value
MAXTON
RV
k V kHz
MAXTON
INDIV
=
××
Ω× ×
075 125
200 100
. .
D 0.75 100
R
200k
1.25V
V
100kHz
MAX
MAXTON
INDIV
SW
= ×
ƒ
D
MAXTON
T
MAX
100
High-Voltage PWM
Power-Supply Controller
10 ______________________________________________________________________________________
capacitor (5µF to 10µF) at the V
CC
pin, since the rail will
not support such a load. It is this current, equivalent to
the product of the total gate switching charge (from the
N-channel MOSFET data sheet), times the operating
frequency, that determines the bulk of the MAX5003
power dissipation.
The driver can source up to 560mA and sink up to 1A
transient current with a typical on source resistance of
4. The no-load output levels are V
CC
and PGND.
Applications Information
Compensation and Loop
Design Considerations
The circuit shown in Figure 2 is essentially an energy
pump. It stores energy in the magnetic core and the air
gap of the transformer while the power switch is on,
and delivers it to the load during the off phase. It can
operate in two modes: continuous and discontinuous.
In discontinuous mode, all the energy is given to the
load before the next cycle begins; in continuous mode,
some energy is continuously stored in the core.
The system has four operating parameters: input volt-
age, output voltage, load current, and duty cycle. The
PWM controller senses the output voltage and the input
voltage, and keeps the output voltage regulated by
controlling the duty cycle.
The output filter in this circuit consists of the load resis-
tance and the capacitance on the output.
To study the stability of the feedback system and
design the compensation necessary for system stability
under all operating conditions, first determine the trans-
fer function. In discontinuous mode, since there is no
energy stored in the inductor at the end of the cycle,
the inductor and capacitor do not show the characteris-
tic double pole, and there is only a dominant pole
defined by the filter capacitor and the load resistance.
There is a zero at a higher frequency, defined by the
ESR of the output filter capacitor. Such a response is
easy to stabilize for a wide range of operating condi-
tions while retaining a reasonably fast loop response.
In continuous mode, the situation is different. The
inductor-capacitor combination creates a double pole,
since energy is stored in the inductor at all times. In
addition to the double pole, a right-half-plane zero
appears in the frequency response curves. This
response is not easy to compensate. It can result in
conditional stability, a complicated compensation net-
work, or very slow transient response.
To avoid the analytical and design problems of the con-
tinuous-conduction mode flyback topology and maintain
good loop response, choose a design incorporating a
discontinuous-conduction mode power stage
To keep the converter in discontinuous mode at all times,
the value of the power transformer’s primary inductance
must be calculated at minimum line voltage and maxi-
mum load, and the maximum duty cycle must be limited.
The MAX5003 has a programmable duty-cycle limit func-
tion intended for this purpose.
Design Methodology
Following is a general procedure for developing a sys-
tem:
1) Determine the requirements.
2) In free-running mode, choose the FREQ pin pro-
gramming resistor. In synchronized mode, determine
the clock frequency (f
CLK)
.
3) Determine the transformer turns ratio, and check the
maximum duty cycle.
4) Determine the transformer primary inductance.
5) Complete the transformer specifications by listing
the primary maximum current, the secondary maxi-
mum current, and the minimum duty cycle at full
power.
6) Choose the MAXTON pin programming resistor.
7) Choose a filter capacitor.
8) Determine the compensation network.
Design Example
1) 36V < V
IN
< 72V, V
OUT
= 5V, I
OUT
= 1A, ripple
< 50mV, settling time 0.5ms.
2) Generally, the higher the frequency, the smaller the
transformer. A higher frequency also gives higher
system bandwidth and faster settling time. The
trade-off is lower efficiency. In this example, 300kHz
switching frequency is the choice to favor for a small
transformer. If the converter will be free running (not
externally synchronized), use the following formula to
calculate the R
FREQ
programming resistor:
where:
R
FREQ
= Resistor between FREQ and ground
ƒ
SW
= Switching frequency (300kHz)
If the converter is synchronized to an external clock,
the input frequency will be 1.2MHz. The external
clock runs at four times the desired switching fre-
quency.
R
kHz
kk
FREQ
SW
=
ƒ
=
100
200 66 7 .
MAX5003
High-Voltage PWM
Power-Supply Controller
______________________________________________________________________________________ 11
MAX5003
3) The main factors influencing the choice of the turns
ratio are the switch breakdown voltage and the duty
cycle. With a smaller turns ratio, the secondary
reflected voltage and the maximum voltage seen by
the switch during flyback are reduced, which is
favorable. On the other hand, a smaller turns ratio
will shorten the duty cycle and increase the primary
RMS current, which can impact efficiency. A good
starting figure is the ratio of the input voltage to the
output voltage, rounding to the nearest integer. To
keep the flyback voltage under control, choose an 8-
to-1 ratio for the 48V to 5V system. The maximum
duty cycle allowed without putting the device in con-
tinuous-conduction mode can be found using the fol-
lowing formula:
where:
N = N
P
/N
S
= Turns ratio
V
SEC
= Secondary voltage
DC
MAX
= Maximum duty cycle
V
MIN
= Minimum power-line voltage
For a 48V to 5V system with an 8-to-1 turns ratio, the
maximum duty cycle before putting the device in
discontinuous mode is 55%. Assume that V
IN
min is
36V (minimum input voltage, neglecting drops in the
power switch and in the resistance of the primary
coil) and V
SEC
is 5.4V (5V plus a Schottky diode
drop). The MAX5003 maximum duty cycle is internal-
ly limited to 75%. Generally this parameter must fall
between 45% to 65% to obtain a balance between
efficiency and flyback voltage while staying out of
continuous conduction. If the value exceeds these
bounds, adjust the turns ratio.
4) Assuming 80% efficiency, a 6.25W input is needed
to produce a 5W output. Set an operating duty cycle
around 12% below the maximum duty cycle to allow
for component variation: 55% - 12% = 43%. Use the
following formula to calculate the primary inductance:
L
DC V
PWR
V
W kHz
H
PRI
MIN
IN SW
=
×
()
×׃
=
×
()
××
≅µ
22
2
043 36
2 6 25 300
65
.
.
DC
V
VN
MAX
MIN
SEC
=
×
+
1
1
High-Voltage PWM
Power-Supply Controller
12 ______________________________________________________________________________________
10µF
0.1µF
C
F
390pF
0.1µF
0.1µF
0V
470nF
R
F
200k
R
CS
0.1
51k
62k
V+
INDIV
ES
FREQ
SS
REF
CON
COMP
8
7
6
5
4
3
2
1
9
10
11
12
13
14
15
16
V
DD
V
CC
NDRV
PGND
CS
AGND
CMSD4448
XFACOILTRCTX03
MBRS130L
8
2
5
7
9, 10
11, 12
IRFD620S
MAXTON
FB
39k
1M
33µF
0.1µF
100
+5V
1A
+48V
(36V TO 72V)
V
IN
R
A
41.2k
R
B
17.4k
22µF
4.7µF
L
P
65µH
22µF
MAX5003
Figure 2. Application Example 1: Nonisolated +48V to +5V Converter

MAX5003EEE+T

Mfr. #:
Manufacturer:
Maxim Integrated
Description:
Switching Controllers PWM Power-Supply Controller
Lifecycle:
New from this manufacturer.
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