10
HIP6006 DC-DC Converter Application Circuit
The figure below shows an application circuit of a DC-DC
Converter for a microprocessor application. Detailed
information on the circuit, including a complete Bill-of-
Materials and circuit board description, can be found in
application note AN9722. See Intersil’s home page on the
web: www.intersil.com.
HIP6006
RT
FB
COMP
SS
REF
-
+
GND
+
-
OSC
VCC
VIN
C1-3
L1
C6-9
0.1µF
2x 1µF
0.1µF
1µF
15k
1k
3x 680µF
4x 1000µF
UGATE
OCSET
PHASE
BOOT
SPARE
CR1
Q1
3.01k
1000pF
CR2
C13
R1
R3
R4
C15
R5
C14
C12
C17-18
C19
R6
C20
4148
U1
RTN
12VCC
14
2
10
9
8
74
5
1
3
SPARE
PGND
LGATE
12
11
PVCC
13
JP1
Q2
1206
1206
MBR
340
V
OUT
RTN
ENABLE
R2
1k
COMP
TP1
PHASE
TP2
6
R7
10k
MONITOR AND
PROTECTION
+
-
+
-
C16
0.01µF
33pF
SPARE
Component Selection Notes:
C1-C3 - 3 each 680µF 25W VDC, Sanyo MV-GX or equivalent
C6-C9 - 4 each 1000µF 6.3W VDC, Sanyo MV-GX or equivalent
L1 - Core: Micrometals T50-52B; Winding: 10 Turns of 17AWG
CR1 - 1N4148 or equivalent
CR2 - 3A, 40V Schottky, Motorola MBR340 or equivalent
Q1, Q2 - Intersil MOSFET; RFP25N05
FIGURE 11. DC-DC CONVERTER APPLICATION CIRCUIT
HIP6006
11
HIP6006
Thin Shrink Small Outline Plastic Packages (TSSOP)
α
INDEX
AREA
E1
D
N
123
-B-
0.10(0.004) C AM BS
e
-A-
b
M
-C-
A1
A
SEATING PLANE
0.10(0.004)
c
E
0.25(0.010) BM M
L
0.25
0.010
GAUGE
PLANE
A2
NOTES:
1. These package dimensions are within allowable dimensions of
JEDEC MO-153-AC, Issue E.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion and gate burrs shall not exceed 0.15mm
(0.006 inch) per side.
4. Dimension “E1” does not include interlead flash or protrusions. Inter-
lead flash and protrusions shall not exceed 0.15mm (0.006 inch) per
side.
5. The chamfer on the body is optional. If it is not present, a visual index
feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. Dimension “b” does not include dambar protrusion. Allowable dambar
protrusion shall be 0.08mm (0.003 inch) total in excess of “b” dimen-
sion at maximum material condition. Minimum space between protru-
sion and adjacent lead is 0.07mm (0.0027 inch).
10. Controlling dimension: MILLIMETER. Converted inch dimensions
are not necessarily exact. (Angles in degrees)
0.05(0.002)
M14.173
14 LEAD THIN SHRINK SMALL OUTLINE PLASTIC
PACKAGE
SYMBOL
INCHES MILLIMETERS
NOTESMIN MAX MIN MAX
A - 0.047 - 1.20 -
A1 0.002 0.006 0.05 0.15 -
A2 0.031 0.051 0.80 1.05 -
b 0.0075 0.0118 0.19 0.30 9
c 0.0035 0.0079 0.09 0.20 -
D 0.195 0.199 4.95 5.05 3
E1 0.169 0.177 4.30 4.50 4
e 0.026 BSC 0.65 BSC -
E 0.246 0.256 6.25 6.50 -
L 0.0177 0.0295 0.45 0.75 6
N14 147
α
0
o
8
o
0
o
8
o
-
Rev. 1 6/00
12
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
HIP6006
Small Outline Plastic Packages (SOIC)
NOTES:
1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of
Publication Number 95.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006
inch) per side.
4. Dimension “E” does not include interlead flash or protrusions. Interlead
flash and protrusions shall not exceed 0.25mm (0.010 inch) per side.
5. The chamfer on the body is optional. If it is not present, a visual index
feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater
above the seating plane, shall not exceed a maximum value of
0.61mm (0.024 inch).
10. Controlling dimension: MILLIMETER. Converted inch dimensions
are not necessarily exact.
INDEX
AREA
E
D
N
123
-B-
0.25(0.010) C AM BS
e
-A-
L
B
M
-C-
A1
A
SEATING PLANE
0.10(0.004)
h x 45
o
C
H
µ
0.25(0.010) BM M
α
M14.15 (JEDEC MS-012-AB ISSUE C)
14 LEAD NARROW BODY SMALL OUTLINE PLASTIC
PACKAGE
SYMBOL
INCHES MILLIMETERS
NOTESMIN MAX MIN MAX
A 0.0532 0.0688 1.35 1.75 -
A1 0.0040 0.0098 0.10 0.25 -
B 0.013 0.020 0.33 0.51 9
C 0.0075 0.0098 0.19 0.25 -
D 0.3367 0.3444 8.55 8.75 3
E 0.1497 0.1574 3.80 4.00 4
e 0.050 BSC 1.27 BSC -
H 0.2284 0.2440 5.80 6.20 -
h 0.0099 0.0196 0.25 0.50 5
L 0.016 0.050 0.40 1.27 6
N14 147
α
0
o
8
o
0
o
8
o
-
Rev. 0 12/93

HIP6006CBZ

Mfr. #:
Manufacturer:
Renesas / Intersil
Description:
Switching Controllers PWMCNTRLR SYNCBUCK-14"
Lifecycle:
New from this manufacturer.
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