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IS62WV1288BLL-55TI

P1-P3P4-P6P7-P9P10-P12P13-P15
4 Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
Rev. E
11/12/08
IS62WV1288ALL, IS62WV1288BLL, IS65WV1288BLL
AC TEST LOADS
Figure 1
Figure 2
CAPACITANCE
(1)
Symbol Parameter Conditions Max. Unit
cI n Input Capacitance VIn = 0V 8 pF
co u t Input/OutputCapacitance Vo u t = 0V 10 pF
Note:
1.Testedinitiallyandafteranydesignorprocesschangesthatmayaffecttheseparameters.
AC TEST CONDITIONS
Parameter 62WV1288ALL 62/65WV1288BLL
(Unit) (Unit)
InputPulseLevel 0.4VtoVd d -0.2V 0.4VtoVd d -0.3V
InputRiseandFallTimes 5ns 5ns
InputandOutputTiming Vr e f Vr e f
andReferenceLevel
OutputLoad SeeFigures1and2 SeeFigures1and2
1.65V - 2.2V 2.5V - 3.6V
r1(Ω) 3070 3070
R2(Ω) 3150 3150
Vr e f 0.9V 1.5V
Vt m 1.8V 2.8V
R1
30 pF
Including
jig and
scope
R2
OUTPUT
VTM
R1
5 pF
Including
jig and
scope
R2
OUTPUT
VTM
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 5
Rev. E
11/12/08
IS62WV1288ALL, IS62WV1288BLL, IS65WV1288BLL
POWER SUPPLY CHARACTERISTICS
(1)
(OverOperatingRange)
1.65V - 2.2V
Symbol Parameter Test Conditions Max. Unit
70 ns
Ic c Vd d DynamicOperating Vd d = Max., Com. 8 mA
Supply Current Io u t = 0 mA, f = fm A x Ind. 8
typ.
(2)
5
Ic c 1 OperatingSupply Vd d = Max., Com. 5 mA
Current Io u t = 0 mA, f = 0 Ind. 5
Is B 1 TTLStandbyCurrent Vd d = Max., Com. 0.8 mA
(TTLInputs) VI n = VIh or VIL Ind. 0.8
CS1 = VI h , CS2 = VI L,
f=1MHz
Is B 2 CMOSStandby Vd d = Max., Com. 10 µA
Current(CMOSInputs) CS1
≥
Vd d – 0.2V, Ind. 10
CS2
≤ 0.2V,
typ.
(2)
5
VI n
≥
Vd d – 0.2V, or
VI n
≤
0.2V, f = 0
Note:
1. At f = f
m A x , address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change.
2.TypicalvaluesaremeasuredatV
d d =1.8V,TA=25
o
C. Not 100% tested.
POWER SUPPLY CHARACTERISTICS
(1)
(OverOperatingRange)
2.5V - 3.6V
Symbol Parameter Test Conditions Max. Max. Unit
45ns 55 ns
Ic c Vd d DynamicOperating Vd d = Max., Com. 17 15 mA
Supply Current Io u t = 0 mA, f = fm A x Ind./A1 17 15
A3 35
typ.
(2)
12 10
Ic c 1 OperatingSupply Vd d = Max., Com. 5 5 mA
Current Io u t = 0 mA, f = 0 Ind./A1 5 5
A3 7
Is B 1 TTLStandbyCurrent Vd d = Max., Com. 0.8 0.8 mA
(TTLInputs) VI n = VI h or VI L Ind./A1 0.8 0.8
CS1 = VIh , CS2 = VIL , A3 3
f=1MHz
Is B 2 CMOSStandby Vd d = Max., Com. 10 10 µA
Current(CMOSInputs) CS1
≥
Vd d – 0.2V, Ind./A1 10 10
CS2
≤ 0.2V,
A3
75
VI n
≥
Vd d – 0.2V, or typ.
(2)
5 5
VIn
≤
0.2V, f = 0
Note:
1. At f = f
m A x , address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change.
2.TypicalvaluesaremeasuredatV
d d =3.0V,TA=25
o
C. Not 100% tested.
6 Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
Rev. E
11/12/08
IS62WV1288ALL, IS62WV1288BLL, IS65WV1288BLL
AC WAVEFORMS
READ CYCLE NO. 1
(1,2)
(Address Controlled) (CS1 = OE = VI L, cs2 = WE = VI h)
DATA VALID
PREVIOUS DATA VALID
t
AA
t
OHA
t
OHA
t
RC
D
OUT
ADDRESS
READ CYCLE SWITCHING CHARACTERISTICS
(1)
(OverOperatingRange)
45 ns 55 ns 70 ns
Symbol Parameter Min. Max. Min. Max. Min. Max. Unit
tr c ReadCycleTime 45 — 55 — 70 — ns
tA A AddressAccessTime — 45 — 55 — 70 ns
to h A OutputHoldTime 10 — 10 — 10 — ns
tA c s 1/tA c s 2 CS1/CS2AccessTime — 45 — 55 — 70 ns
td o e OEAccessTime — 20 — 25 — 35 ns
th z o e
(2)
OEtoHigh-ZOutput 0 15 0 20 0 25 ns
tL z o e
(2)
OEtoLow-ZOutput 5 — 5 — 5 — ns
th z c s 1/th z c s 2
(2)
CS1/CS2toHigh-ZOutput 0 15 0 20 0 25 ns
tL z c s 1/tL z c s 2
(2)
CS1/CS2toLow-ZOutput 5 — 10 — 10 — ns
Notes:
1. Testconditionsassumesignaltransitiontimesof5nsorless,timingreferencelevelsof0.9V/1.5V,inputpulselevelsof0.4to
V
d d -0.2V/Vd d -0.3VandoutputloadingspeciedinFigure1.
2. TestedwiththeloadinFigure2.Transitionismeasured±500mVfromsteady-statevoltage.Not100%tested.
P1-P3P4-P6P7-P9P10-P12P13-P15

IS62WV1288BLL-55TI

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ISSI
Description:
SRAM 1Mb 128Kx8 55ns Async SRAM
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