MC10EP35DT

MC100EP35
www.onsemi.com
4
Table 5. 100EP DC CHARACTERISTICS, PECL (V
CC
= 3.3 V, V
EE
= 0 V (Note 1))
−40°C 25°C 85°C
Symbol Characteristic Min Typ Max Min Typ Max Min Typ Max Unit
I
EE
Power Supply Current 30 40 50 30 40 50 30 40 50 mA
V
OH
Output HIGH Voltage (Note 2) 2155 2280 2405 2155 2280 2405 2155 2280 2405 mV
V
OL
Output LOW Voltage (Note 2) 1355 1480 1605 1355 1480 1605 1355 1480 1605 mV
V
IH
Input HIGH Voltage (Single-Ended) 2075 2420 2075 2420 2075 2420 mV
V
IL
Input LOW Voltage (Single-Ended) 1355 1675 1355 1675 1355 1675 mV
I
IH
Input HIGH Current 150 150 150
mA
I
IL
Input LOW Current 0.5 0.5 0.5
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
1. Input and output parameters vary 1:1 with V
CC
. V
EE
can vary +0.3 V to −2.2 V.
2. All loading with 50 W to V
CC
− 2.0 V.
Table 6. 100EP DC CHARACTERISTICS, PECL (V
CC
= 5.0 V, V
EE
= 0 V (Note 1))
−40°C 25°C 85°C
Symbol Characteristic Min Typ Max Min Typ Max Min Typ Max Unit
I
EE
Power Supply Current 30 40 50 30 40 50 30 40 50 mA
V
OH
Output HIGH Voltage (Note 2) 3855 3980 4105 3855 3980 4105 3855 3980 4105 mV
V
OL
Output LOW Voltage (Note 2) 3055 3180 3305 3055 3180 3305 3055 3180 3305 mV
V
IH
Input HIGH Voltage (Single-Ended) 3775 4120 3775 4120 3775 4120 mV
V
IL
Input LOW Voltage (Single-Ended) 3055 3375 3055 3375 3055 3375 mV
I
IH
Input HIGH Current 150 150 150
mA
I
IL
Input LOW Current 0.5 0.5 0.5
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
1. Input and output parameters vary 1:1 with V
CC
. V
EE
can vary +2.0 V to −0.5 V.
2. All loading with 50 W to V
CC
− 2.0 V.
Table 7. 100EP DC CHARACTERISTICS, NECL (V
CC
= 0 V; V
EE
= −5.5 V to −3.0 V (Note 1))
−40°C 25°C 85°C
Symbol Characteristic Min Typ Max Min Typ Max Min Typ Max Unit
I
EE
Power Supply Current 30 40 50 30 40 50 30 40 50 mA
V
OH
Output HIGH Voltage (Note 2) −1145 −1020 −895 −1145 −1020 −895 −1145 −1020 −895 mV
V
OL
Output LOW Voltage (Note 2) −1945 −1820 −1695 −1945 −1820 −1695 −1945 −1820 −1695 mV
V
IH
Input HIGH Voltage (Single-Ended) −1225 −880 −1225 −880 −1225 −880 mV
V
IL
Input LOW Voltage (Single-Ended) −1945 −1625 −1945 −1625 −1945 −1625 mV
I
IH
Input HIGH Current 150 150 150
mA
I
IL
Input LOW Current 0.5 0.5 0.5
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
1. Input and output parameters vary 1:1 with V
CC
.
2. All loading with 50 W to V
CC
− 2.0 V.
MC100EP35
www.onsemi.com
5
Table 8. AC CHARACTERISTICS (V
CC
= 0 V; V
EE
= −3.0 V to −5.5 V or V
CC
= 3.0 V to 5.5 V; V
EE
= 0 V (Note 1))
−40°C 25°C 85°C
Symbol Characteristic Min Typ Max Min Typ Max Min Typ Max Unit
f
max
Maximum Frequency
(See Figure 2. F
max
/JITTER)
> 3 > 3 > 3 GHz
t
PLH
,
t
PHL
Propagation Delay to Output Differential
R, CLK to Q, Q
200 400 480 200 410 490 200 420 575 ps
t
RR
Reset Recovery 150 80 150 90 150 100 ps
t
S
t
H
Setup Time
Hold Time
150
150
50
50
150
150
50
50
150
150
80
80
ps
t
PW
Minimum Pulse width
RESET
550 400 550 400 550 400 ps
t
JITTER
Cycle-to-Cycle Jitter
(See Figure 2. F
max
/JITTER)
0.2 < 1 0.2 < 1 0.2 < 1 ps
t
r
t
f
Output Rise/Fall Times
Q, Q
(20% − 80%)
70 120 170 80 130 180 100 150 200 ps
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
1. Measured using a 750 mV source, 50% duty cycle clock source. All loading with 50 W to V
CC
− 2.0 V.
0
100
200
300
400
500
600
700
800
900
0 1000 2000 3000 4000 5000
Figure 2. F
max
/Jitter
FREQUENCY (MHz)
1
2
3
4
5
6
7
8
9
(JITTER)
V
OUTpp
(mV)
JITTER
OUT
ps (RMS)
MC100EP35
www.onsemi.com
6
Figure 3. Typical Termination for Output Driver and Device Evaluation
(See Application Note AND8020/D
− Termination of ECL Logic Devices.)
Driver
Device
Receiver
Device
QD
Q D
Z
o
= 50 W
Z
o
= 50 W
50 W 50 W
V
TT
V
TT
= V
CC
− 2.0 V
ORDERING INFORMATION
Device Package Shipping
MC100EP35DG SOIC−8 NB
(Pb-Free)
98 Units / Rail
MC100EP35DTG TSSOP−8
(Pb-Free)
100 Units / Rail
MC100EP35DTR2G TSSOP−8
(Pb-Free)
2500 / Tape & Reel
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D
.
Resource Reference of Application Notes
AN1405/D ECL Clock Distribution Techniques
AN1406/D Designing with PECL (ECL at +5.0 V)
AN1503/D
ECLinPSt I/O SPiCE Modeling Kit
AN1504/D Metastability and the ECLinPS Family
AN1568/D Interfacing Between LVDS and ECL
AN1672/D The ECL Translator Guide
AND8001/D Odd Number Counters Design
AND8002/D Marking and Date Codes
AND8020/D Termination of ECL Logic Devices
AND8066/D Interfacing with ECLinPS
AND8090/D AC Characteristics of ECL Devices

MC10EP35DT

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
Flip Flops 3.3V/5V ECL JK-Type
Lifecycle:
New from this manufacturer.
Delivery:
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