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SIT1618AA-12-33E-32.000000D
P1-P3
P4-P6
P7-P9
P10-P12
P13-P15
P16-P18
The Smart Timing Choice
The Smart Timing Choice
SiT1618
S
tandard Frequency
, High T
emperature Oscillator
Rev
. 1.0
Page 4 of 13
www
.sitime.com
Note:
9. SiT1618 has “no runt” pulses and “no gli
t
ch” output during st
artup or resume.
T
est Circui
t and W
a
veform
[8]
Figure 2. T
est Circuit
Note:
8. Duty Cycle is computed as Duty Cycle = TH/Period.
Figure 3.
Wavefo
rm
Timing Diagr
ams
Figure 4. St
artup Timing (OE/ST
Mode)
Figure 5. S
tandby Resume T
iming (ST
Mode Only)
u
Figure 6. OE
Enable Timing (OE Mode O
nly)
F
igure 7.
OE Disable Timing (OE Mode Only)
4
1
3
2
0.1µF
Power
Supply
OE/ST Function
Test
Point
15pF
(inc
ludi
ng probe
and fix
ture
capaci
tance
)
Vdd
Vout
Vdd
1k
80% Vdd
High Pul
se
(TH)
50%
20% Vdd
Period
tf
tr
Low Pulse
(TL)
90% Vdd
Vdd
Pi
n 4 Vol
t
age
CLK
Out
pu
t
T_st
ar
t
T
_s
tart: T
i
m
e
to s
t
a
rt from
po
w
er
-off
No Gl
i
t
ch
duri
ng star
t
up
[9]
50% Vdd
Vdd
ST Voltage
CLK Outpu
t
T_res
ume
T_res
ume: T
ime to r
esume
from
ST
50% Vdd
Vdd
OE Voltage
CLK Output
T_oe
T_oe: Time t
o re-enabl
e the cl
ock output
50% Vdd
Vdd
OE Voltage
CLK Output
T_oe:
Time to put t
he output i
n Hi
gh Z mode
HZ
T_oe
The Smart Timing Choice
The Smart Timing Choice
SiT1618
S
tandard Frequency
, High T
emperature Oscillator
Rev
. 1.0
Page 5 of 13
www
.sitime.com
Performance Plot
s
[10]
Figure 8. Idd vs
Frequency
Figure 9. Freq
uency vs T
emperature
Figure 10. RMS Period Jitter vs Frequency
Figure 1
1. Duty Cycle vs Frequency
Figure 12. 20%-80% Rise Time vs T
emperature
Figure 13.
20%-80% Fall Time vs T
emperature
Idd (mA)
Frequency (MHz)
3. 0
3. 2
3. 4
3. 6
3. 8
4. 0
4. 2
4. 4
4. 6
4. 8
5. 0
01
0
2
0
3
0
4
0
5
0
1.
8 V
2.
5 V
2.
8 V
3 V
3. 3 V
-2
5
-2
0
-1
5
-1
0
-5
0
5
10
15
20
25
-
4
0
-
2
0
0
2
04
06
08
0
1
0
0
1
2
0
F
r
e
q
u
e
n
c
y
(
p
p
m
)
T
emper
atu
re (
C
)
DU
T
1
DU
T
2
DU
T
3
DU
T
4
DU
T
5
DU
T
6
DU
T
7
DU
T
8
DU
T
9
DU
T
10
Frequency (ppm)
Temperature (°C)
RMS perio
d jitter (
ps)
Frequency (M
Hz)
0.
0
0.
5
1.
0
1.
5
2.
0
2.
5
3.
0
3.
5
4.
0
0
1
02
03
04
05
0
1.8
V
2.5 V
2.
8 V
3.
0 V
3.
3 V
Duty cycle (%)
Frequency (MHz)
45
46
47
48
49
50
51
52
53
54
55
0
1
02
03
04
05
0
1.8 V
2.
5 V
2.
8 V
3. 0 V
3.3 V
Rise time (ns)
Temperature (°
C)
0.
0
0.
5
1.
0
1.
5
2.
0
2.
5
-
4
0
-
2
0
0
2
04
06
08
0
1
0
0
1
2
0
1.8 V
2.5 V
2.8 V
3.
0 V
3.3
V
Fall time (ns)
Temp
erature
(°C)
0.
0
0.
5
1.
0
1.
5
2.
0
2.
5
-40
-20
0
20
40
60
80
100
120
1.8 V
2.
5 V
2.8 V
3.
0 V
3.3
V
The Smart Timing Choice
The Smart Timing Choice
SiT1618
S
tandard Frequency
, High T
emperature Oscillator
Rev
. 1.0
Page 6 of 13
www
.sitime.com
Performance Plot
s
[10]
Figure 14. RMS Integ
rated Phase Jitter Ra
ndom
(12 kHz to 20 MHz) vs Fre
quency
[1
1]
Figure 15. RMS Integrated Phase Jitter Random
(900 kHz to 7.5 MHz)
vs Frequency
[1
1]
Notes:
10. All plots are measu
red with 15 pF load at room temperature, unless otherwise st
ated.
1
1. Phase noise
plots are measured with Agi
lent E5052B signal sour
ce an
alyzer
. Integration range is up to 5 MHz for carrier fre
qu
encies below 40 MHz.
IPJ (ps)
Frequency (M
Hz)
1
1.
1
1.
2
1.
3
1.
4
1.
5
1.
6
1.
7
1.
8
1.
9
2
10
15
20
25
30
3
5
40
45
50
1.
8 V
2.
5 V
2.
8 V
3.
0
V
3.
3
V
IPJ (ps)
Frequency (MHz)
0.
3
0.
4
0.
5
0.
6
0.
7
0.
8
0.
9
1
10
15
20
25
30
35
40
45
50
1.
8 V
2.
5 V
2.
8 V
3.
0 V
3.
3
V
P1-P3
P4-P6
P7-P9
P10-P12
P13-P15
P16-P18
SIT1618AA-12-33E-32.000000D
Mfr. #:
Buy SIT1618AA-12-33E-32.000000D
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Description:
MEMS OSC XO 32.0000MHZ LVCMOS LV
Lifecycle:
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