MAX4031EESD+

decrease bandwidth or cause oscillations. For exam-
ple, a noninverting gain-of-two configuration (R
F
= R
G
)
using 2k resistors, combined with 4pF of amplifier
input capacitance and 1pF of PC board capacitance,
cause a pole at 79.6MHz. Since this pole is within the
amplifier bandwidth, it jeopardizes stability. Reducing
the 2k resistors to 100 extends the pole frequency
to 1.59GHz, but could limit output swing by adding
200 in parallel with the amplifier’s load resistor
(Figures 1 and 2).
Layout and Power-Supply Bypassing
These amplifiers operate from a single 5V power sup-
ply. Bypass V
CC
to ground with a 0.1µF capacitor as
close to V
CC
as possible. Maxim recommends using
microstrip and stripline techniques to obtain full band-
width. To ensure that the PC board does not degrade
the amplifier’s performance, design it for a frequency
greater than 1GHz. Pay careful attention to inputs and
outputs to avoid large parasitic capacitance. Under all
conditions observe the following design guidelines:
Do not use wire-wrap boards. Wire-wrap boards are
too inductive.
Do not use IC sockets. Sockets increase parasitic
capacitance and inductance.
Use surface mount instead of through-hole compo-
nents for better high-frequency performance.
Use a PC board with at least two layers. The PC
board should be as free from voids as possible.
Keep signal lines as short and as straight as possi-
ble. Do not make 90° turns; round all corners.
Output Capacitive Loading and Stability
The MAX4030E/MAX4031E are optimized for AC perfor-
mance and do not drive highly reactive loads, which
decreases phase margin and can produce excessive
ringing and oscillation. Figure 3 shows a circuit modifi-
cation that uses an isolation resistor (R
ISO
) to eliminate
this problem. Figure 4 shows a graph of the Optimal
Isolation Resistor (R
ISO
) vs. Capacitive Load. Figure 5
shows how a capacitive load causes excessive peak-
ing of the amplifier’s frequency response if the capaci-
tor is not isolated from the amplifier by a resistor. A
small isolation resistor (usually 10 to 15) placed
before the reactive load prevents ringing and oscilla-
tion. At higher capacitive loads, the interaction of the
load capacitance and the isolation resistor controls the
AC performance. Figure 6 shows the effect of a 10
isolation resistor on closed-loop response.
ESD Protection
As with all Maxim devices, ESD protection structures
are incorporated on all pins to protect against ESD
encountered during handling and assembly. Input and
output pins of the MAX4030E/MAX4031E have extra
protection against static electricity. Maxim’s engineers
have developed state-of-the-art structures enabling
these pins to withstand ESD up to ±15kV without dam-
age when placed in the test circuit (Figure 7). The
MAX4030E/MAX4031E are characterized for protection
to the following limits:
•±15kV using the Human Body Model
•±8kV using the Contact Discharge method speci-
fied in IEC 1000-4-2
•±15kV using the Air-Gap Discharge method speci-
fied in IEC 1000-4-2
MAX4030E/MAX4031E
Low-Cost, 144MHz, Dual/Triple Op Amps
with ±15kV ESD Protection
_______________________________________________________________________________________ 7
IN
R
G
V
OUT
= -(R
F
/ R
G
) V
IN
R
F
V
OUT_
MAX403_E
R
L
150
Figure 2. Inverting Gain Configuration
IN_+
R
G
V
OUT
= [1+ (R
F
/ R
G
)] V
IN_+
R
F
V
OUT_
MAX403_E
R
L
150
Figure 1. Noninverting Gain Configuration
Figure 3. Driving a Capacitive Load Through an Isolation Resistor
R
F
24
R
ISO
C
L
V
OUT_
V
IN_+
MAX403_E
MAX4030E/MAX4031E
Human Body Model
Figure 8 shows the Human Body Model and Figure 9
shows the current waveform it generates when dis-
charged into low impedance. This model consists of a
150pF capacitor charged to the ESD voltage of interest,
and then discharged into the test device through a
1.5k resistor.
IEC 1000-4-2
The IEC 1000-4-2 standard covers ESD testing and per-
formance of finished equipment; it does not specifically
refer to ICs. The MAX4030E/MAX4031E enable the
design of equipment that meets the highest level (level
4) of IEC 1000-4-2 without the need for additional ESD
protection components. The major difference between
tests done using the Human Body Model and IEC 1000-
4-2 is higher peak current in IEC 1000-4-2. Because
series resistance is lower in the IEC 1000-4-2 model, the
ESD-withstand voltage measured to this standard is gen-
erally lower than that measured using the Human Body.
Figure 10 shows the IEC 1000-4-2 model and Figure 11
shows the current waveform for the ±8kV IEC 1000-4-2
level 4 ESD Contact Discharge test. The Air-Gap test
involves approaching the device with a charged probe.
The Contact Discharge method connects the probe to
the device before the probe is energized.
Chip Information
MAX4030E TRANSISTOR COUNT: 271
MAX4031E TRANSISTOR COUNT: 387
PROCESS: BiCMOS
Low-Cost, 144MHz, Dual/Triple Op Amps
with ±15kV ESD Protection
8 _______________________________________________________________________________________
ISOLATION RESISTANCE
vs. CAPACITIVE LOAD
CAPACITIVE LOAD (pF)
R
ISO
()
400300200100
2
4
6
8
10
12
14
16
18
20
0
0 500
Figure 4. Isolation Resistance vs. Capacitive Load
SMALL-SIGNAL GAIN vs. FREQUENCY WITH LOAD
CAPACITANCE AND NO ISOLATION RESISTOR
FREQUENCY (MHz)
GAIN (dB)
100101
-3
-4
-5
-2
-1
0
1
2
3
4
5
6
-6
0.1 1000
C
L
= 20pF
C
L
= 10pF
C
L
= 5pF
Figure 5. Small-Signal Gain vs. Frequency with Load
Capacitance and No Isolation Resistor
SMALL-SIGNAL GAIN vs. FREQUENCY WITH LOAD
CAPACITANCE AND 10 ISOLATION RESISTOR
FREQUENCY (MHz)
GAIN (dB)
100101
-3
-4
-5
-2
-1
0
1
2
3
4
5
6
-6
0.1 1000
C
L
= 20pF
C
L
= 10pF
C
L
= 5pF
Figure 6. Small-Signal Gain vs. Frequency with Load
Capacitance and 10Isolation Resistor
MAX4030E/MAX4031E
Low-Cost, 144MHz, Dual/Triple Op Amps
with ±15kV ESD Protection
_______________________________________________________________________________________ 9
HIGH-
VOLTAGE
DC
SOURCE
CHARGE CURRENT
LIMIT RESISTOR
DISCHARGE
RESISTANCE
STORAGE
CAPACITOR
R
D
= 1.5k
R
C
= 1M
C
S
= 150pF
DEVICE
UNDER
TEST
Figure 8. Human Body ESD Model
I
P
100%
90%
36.8%
t
RL
TIME
t
DL
CURRENT WAVEFORM
PEAK-TO-PEAK RINGING
(NOT DRAWN TO SCALE)
I
r
10%
0
0
AMPERES
Figure 9. Human Body Current Waveform
t
r
= 0.7ns TO 1ns
30ns
60ns
t
100%
90%
10%
I
PEAK
I
Figure 11. IEC 1000-4-2 ESD Generator Current Waveform
CHARGE CURRENT
LIMIT RESISTOR
DISCHARGE
RESISTANCE
STORAGE
CAPACITOR
C
S
150pF
R
C
50M
TO
100M
R
D
330
HIGH-
VOLTAGE
DC
SOURCE
DEVICE
UNDER
TEST
Figure 10. IEC 1000-4-2 ESD Test Model
200
200
75
MAX403_E
5V
C
BYPASS
0.1µF
75
TEST
POINT B
TEST
POINT A
V
EE
Figure 7. ESD Test Circuit

MAX4031EESD+

Mfr. #:
Manufacturer:
Maxim Integrated
Description:
High Speed Operational Amplifiers 144MHz Dual/Triple w/ESD Protection
Lifecycle:
New from this manufacturer.
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