5
LTC1042
1042fa
APPLICATIO S I FOR ATIO
WUUU
Figure 2. Equivalent Input Circuit
To synchronize the sampling of the LTC1042 to an external
frequency source, the OSC pin can be driven by a CMOS
gate. A CMOS gate is necessary because the input trip
points of the oscillator are close to the supply rails and TTL
does not have enough output swing. Externally driven,
there will be a delay from the rising edge of the OSC input
and the start of the sampling cycle of approximately 5µs.
Input Impedance
The input impedance of the LTC1042 does not look like a
classic linear comparator; CMOS switches and a precision
capacitor array form the dual differential input structure.
Input impedance characteristics can be determined from
the equivalent circuit shown in Figure 2. The input
capacitance will charge with a time constant of R
S
• C
IN
. It
is critical, in determining errors caused by the input
charging current, that C
IN
be fully charged during the
“active” time.
For R
S
≤ 10kΩ
For Rs less than or equal to 10kΩ, C
IN
fully charges and no
error is caused by the charging current.
For R
S
> 10kΩ
For source resistances greater than 10kΩ, C
IN
cannot fully
charge, causing voltage errors. To minimize these errors
an input bypass capacitor, C
S
should be used. Charge is
shared between C
IN
and C
S
causing a voltage error. The
magnitude of this error is ∆V = V
IN
x C
IN
/(C
IN
+ C
S
). This
error can be made arbitrarily small by increasing C
S
.
The averaging effect of the bypass capacitor C
S
causes
another error term. Each time the input switches cycle
between the plus and minus inputs, C
IN
is charged and
discharged. The average input current due to this is
l
AVG
= V
IN
x C
IN
x f
S
, where f
S
is the sampling frequency.
Because the input current is directly proportional to the
differential input voltage, the LTC1042 can be said to have
an average input resistance of R
IN
= V
IN
/I
AVG
= 1/(f
S
x C
IN
).
Since two comparator inputs are connected in parallel, R
IN
is one half this value (see typical curve of R
IN
vs Sampling
Frequency). This finite input resistance causes an error
due to voltage divided between R
S
and R
IN
.
The input error caused by both of these effects is
V
ERROR
= V
IN
[2C
IN
/(2C
IN
+ C
S
) + R
S
/(R
S
+ R
IN
)].
EXAMPLE: Assume f
S
= 10Hz, R
S
= 1MΩ, C
S
= 1µF and
V
IN
= 1V. Then V
ERROR
= 1V(66µV + 660µV) = 726µV. If the
sampling frequency is reduced to 1Hz, the voltage error
from input impedance effects is reduced to 136µV.
Input Voltage Range
The input switches of the LTC1042 are capable of
switching either to the V
+
supply or ground. Consequently,
the input voltage range includes both supply rails. This is
a further benefit of the input sampling structure.
Error Specifications
The only measurable errors on the LTC1042 are the
deviations from “ideal” of the upper and lower window
limits [Figure 1(B)]. The critical parameters for a window
comparator are the width and center of the window. These
errors may be expressed in terms of V
U
and V
L
.
center error = [(V
U
+ V
L
)/2] – CENTER
width error = (V
U
– V
L
) – 2 x (WIDTH/2)
The specified error limits (see Electrical Characteristics)
include error due to offset, power supply variation, gain,
time and temperature.
V
IN
R
S
C
S
LTC1042 • AI02
S1
S2
C
IN
(~33pF)
V
–
LTC1042 DIFFERENTIAL INPUT
~
+
–
