INDUSTRIAL TEMPERATURE RANGE
IDT74ALVCH32245
3.3V CMOS 32-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS
1
JUNE 2016INDUSTRIAL TEMPERATURE RANGE
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©2016 Integrated Device Technology, Inc. DSC-4907/7
FEATURES:
• 0.5 MICRON CMOS Technology
• Typical tSK(o) (Output Skew) < 250ps
• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
machine model (C = 200pF, R = 0)
•VCC = 3.3V ± 0.3V, Normal Range
•VCC = 2.7V to 3.6V, Extended Range
•VCC = 2.5V ± 0.2V
• CMOS power levels (0.4
μμ
μμ
μ W typ. static)
• Rail-to-Rail output swing for increased noise margin
• Available in 96-ball LFBGA package
FUNCTIONAL BLOCK DIAGRAM
DRIVE FEATURES:
• High Output Drivers: ±24mA
• Suitable for Heavy Loads
APPLICATIONS:
• 3.3V high speed systems
• 3.3V and lower voltage computing systems
IDT74ALVCH32245
3.3V CMOS 32-BIT
BUS TRANSCEIVER
WITH 3-STATE OUTPUTS
AND BUS-HOLD
DESCRIPTION:
This 32-bit bus transceiver is built using advanced dual metal CMOS
technology. This high-speed, low power transceiver is ideal for asynchro-
nous communication between two busses (A and B). The Direction and
Output Enable controls are designed to operate the device as either four
independent 8-bit transceivers or one 32-bit transceiver. The direction
control pins (DIR) control the direction of data flow. The output enable pins
(OE) override the direction control and disable both ports. All inputs are
designed with hysteresis for improved noise margin.
The ALVCH32245 has been designed with a ±24mA output driver. This
driver is capable of driving a moderate to heavy load while maintaining
speed performance.
The ALVCH32245 has “bus-hold” which retains the inputs’ last state
whenever the input bus goes to a high impedance. This prevents floating
inputs and eliminates the need for pull-up/down resistors.
1
DIR
1
A
1
1
B
1
1
OE
TO SEVEN OTHER CHANNELS
3
DIR
3
A
1
3
B
1
3
OE
2
DIR
2
A
1
2
B
1
2
OE
4
DIR
4
A
1
4
B
1
4
OE
A3
A5
H3
E5
A4
A2
H4
E2
J3
J5
J4
J2
T3
N5
T4
N2
TO SEVEN OTHER CHANNELS
TO SEVEN OTHER CHANNELS
TO SEVEN OTHER CHANNELS
