LTC3407-2
14
34072fc
PACKAGE DESCRIPTION
TYPICAL APPLICATIONS
1.2mm Height Core Supply
Effi ciency vs Load Current
RUN2 V
IN
V
IN
= 3.6V
TO 5.5V
V
OUT2
= 3.3V
AT 800mA
V
OUT1
= 1.8V
AT 800mA
RUN1
POR
SW1
V
FB1
GND
V
FB2
SW2
MODE/SYNC
LTC3407-2
C1*
4.7μF
R5
100k
POWER-ON
RESET
C4, 22pFC5, 22pF
L1
2.2μH
L2
2.2μH
R4
887k
R2
604k
R1
301k
R3
196k
C3
4.7μF
s2
C2
4.7μF
s2
3407 TA07
C1, C2, C3: TDK C1608X5ROJ475M
L1, L2: CMD4D11-2R2
*IF C1 IS GREATER THAN 3" FROM POWER SOURCE,
ADDITIONAL CAPACITANCE MAY BE REQUIRED.
LOAD CURRENT (mA)
1
EFFICIENCY (%)
100
95
90
85
80
75
70
65
60
10 100 1000
3407 TA08
3.3V
1.8V
V
IN
= 5V
Burst Mode OPERATION
NO LOAD ON OTHER CHANNEL
NOTE:
1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-2).
CHECK THE LTC WEBSITE DATA SHEET FOR CURRENT STATUS OF VARIATION ASSIGNMENT
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
3.00 ±0.10
(4 SIDES)
0.75 ±0.05
PIN 1
TOP MARK
(SEE NOTE 6)
0.200 REF
0.00 – 0.05
0.25 ± 0.05
2.38 ±0.05
(2 SIDES)
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
1.65 ±0.05
(2 SIDES)2.15 ±0.05
0.50
BSC
0.70 ±0.05
3.55 ±0.05
PACKAGE
OUTLINE
0.40 ± 0.10
BOTTOM VIEW—EXPOSED PAD
1.65 ± 0.10
(2 SIDES)
R = 0.125
TYP
2.38 ±0.10
(2 SIDES)
15
106
(DD) DFN REV B 0309
0.25 ± 0.05
0.50 BSC
DD Package
10-Lead Plastic DFN (3mm × 3mm)
(Reference LTC DWG # 05-08-1699 Rev B)