AD8802/AD8804
REV. 0
–3–
ABSOLUTE MAXIMUM RATINGS
(T
A
= +25°C, unless otherwise noted)
V
DD
to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3, + 8 V
V
REFX
to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 V, V
DD
Outputs (Ox) to GND . . . . . . . . . . . . . . . . . . . . . . . . 0 V, V
DD
Digital Input Voltage to GND . . . . . . . . . . . . . . . . . 0 V, +8 V
Operating Temperature Range . . . . . . . . . . . . –40°C to +85°C
Maximum Junction Temperature (T
J
MAX) . . . . . . . . +150°C
Storage Temperature . . . . . . . . . . . . . . . . . . –65°C to +150°C
Lead Temperature (Soldering, 10 sec) . . . . . . . . . . . . . +300°C
Package Power Dissipation . . . . . . . . . . . . (T
J
MAX – T
A
)/θ
JA
Thermal Resistance θ
JA,
SOIC (SOL-20) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60°C/W
P-DIP (N-20) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57°C/W
TSSOP-20 (RU-20) . . . . . . . . . . . . . . . . . . . . . . . . 155°C/W
AD8802 PIN DESCRIPTIONS
Pin Name Description
1V
REF
Common DAC Reference Input
2 O1 DAC Output #1, addr = 0000
2
3 O2 DAC Output #2, addr = 0001
2
4 O3 DAC Output #3, addr = 0010
2
5 O4 DAC Output #4, addr = 0011
2
6 O5 DAC Output #5, addr = 0100
2
7 O6 DAC Output #6, addr = 0101
2
8 SHDN Reference input current goes to zero. DAC
latch settings maintained
9
CS Chip Select Input, Active Low. When CS
returns high, data in the serial input register is
decoded based on the address bits and loaded
into the target DAC register
10 GND Ground
11 CLK Serial Clock Input, Positive Edge Triggered
12 SDI Serial Data Input
13 O7 DAC Output #7, addr = 0110
2
14 O8 DAC Output #8, addr = 0111
2
15 O9 DAC Output #9, addr = 1000
2
16 O10 DAC Output #10, addr = 1001
2
17 O11 DAC Output #11, addr = 1010
2
18 O12 DAC Output #12, addr = 1011
2
19 RS Asynchronous Preset to Midscale Output
Setting. Loads all DAC Registers with 80
H
20 V
DD
Positive Power Supply, Specified for Operation
at Both +3 V and +5 V
PIN CONFIGURATIONS
14
13
12
11
17
16
15
20
19
18
9
8
1
2
3
4
7
6
5
10
O10
O11
O12
V
DD
O7
O8
O9
V
REFL
CLK
SDI
V
REFH
O1
O2
O3
O4
O5
O6
SHDN
CS
GND
TOP VIEW
(Not to Scale)
AD8804
14
13
12
11
17
16
15
20
19
18
10
9
8
1
2
3
4
7
6
5
TOP VIEW
(Not to Scale)
V
REFH
O11
O12
RS
V
DD
O1
O2
O3
AD8802
O8
O9
O10
O4
O5
O6
SHDN
CS
GND CLK
SDI
O7
AD8804 PIN DESCRIPTIONS
Pin Name Description
1V
REFH
Common High-Side DAC Reference Input
2 O1 DAC Output #1, addr = 0000
2
3 O2 DAC Output #2, addr = 0001
2
4 O3 DAC Output #3, addr = 0010
2
5 O4 DAC Output #4, addr = 0011
2
6 O5 DAC Output #5, addr = 0100
2
7 O6 DAC Output #6, addr = 0101
2
8 SHDN Reference input current goes to zero DAC latch
settings maintained
9
CS Chip Select Input, Active Low. When CS returns
high, data in the serial input register is decoded
based on the address bits and loaded input the
target DAC register
10 GND Ground
11 V
REFL
Common Low-Side DAC Reference Input
12 CLK Serial Clock Input, Positive Edge Triggered
13 SDI Serial Data Input
14 O7 DAC Output #7, addr = 0110
2
15 O8 DAC Output #8, addr = 0111
2
16 O9 DAC Output #9, addr = 1000
2
17 O10 DAC Output #10, addr = 1001
2
18 O11 DAC Output #11, addr = 1010
2
19 O12 DAC Output #12, addr = 1011
2
20 V
DD
Positive power supply, specified for operation at
both +3 V and +5 V
ORDERING GUIDE
Temperature Package Package
Model FTN Range Description Option
AD8802AN
RS –40°C/+85°C PDIP-20 N-20
AD8802AR RS –40°C/+85°C SOL-20 R-20
AD8802ARU
RS –40°C/+85°C TSSOP-20 RU-20
AD8804AN REFL –40°C/+85°C PDIP-20 N-20
AD8804AR REFL –40°C/+85°C SOL-20 R-20
AD8804ARU REFL –40°C/+85°C TSSOP-20 RU-20
WARNING!
ESD SENSITIVE DEVICE
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although these devices feature proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.