RT8026
10
DS8026-02 March 2011www.richtek.com
losses are proportional to V
IN
and thus their effects will
be more pronounced at higher supply voltages.
2. I
2
R losses are calculated from the resistances of the
internal switches, R
SW
and external inductor R
L
. In
continuous mode the average output current flowing
through inductor L is “chopped” between the main switch
and the synchronous switch. Thus, the series resistance
looking into the LX pin is a function of both top and bottom
MOSFET R
DS(ON)
and the duty cycle (DC) as follows :
R
SW
= R
DS(ON)TOP
x DC + R
DS(ON)BOT
x (1−DC)
The R
DS(ON)
for both the top and bottom MOSFETs can be
obtained from the Typical Performance Characteristics
curves. Thus, to obtain I
2
R losses, simply add R
SW
to R
L
and multiply the result by the square of the average output
current.
Other losses including C
IN
and C
OUT
ESR dissipative
losses and inductor core losses generally account for less
than 2% of the total loss.
Layout Considerations
For the best performance of the RT8026, the following
guidelines must be strictly followed.
` The input capacitor should be placed as close as possible
to the device pins (VIN and GND).
` The LX node is with high frequency voltage swing. It
should be kept at a small area.
` Place the feedback components as close as possible to
the IC and keep away from the noisy devices.
` The GND and PGND should be connected to a strong
ground plane for heat sinking and noise protection.
Thermal Considerations
For continuous operation, do not exceed absolute
maximum operation junction temperature. The maximum
power dissipation depends on the thermal resistance of
IC package, PCB layout, the rate of surroundings airflow
and temperature difference between junction to ambient.
The maximum power dissipation can be calculated by
following formula :
P
D(MAX)
= ( T
J(MAX)
− T
A
) / θ
JA
Where T
J(MAX)
is the maximum operation junction
temperature 125°C, T
A
is the ambient temperature and
the θ
JA
is the junction to ambient thermal resistance.
For recommended operating conditions specification of
RT8026, the maximum junction temperature is 125°C.The
junction to ambient thermal resistance θ
JA
is layout
dependent. For MSOP-10 packages, the thermal
resistance θ
JA
is 120°C/W on the standard JEDEC 51-7
four layers thermal test board. The maximum power
dissipation at T
A
= 25°C can be calculated by following
formula :
P
D(MAX)
= (125°C − 25°C) / (120°C/W) = 0.833W for
MSOP-10 packages
The maximum power dissipation depends on operating
ambient temperature for fixed T
J(MAX)
and thermal
resistance θ
JA
. For RT8026 packages, the Figure 3 of
derating curves allows the designer to see the effect of
rising ambient temperature on the maximum power
allowed.
Figure 3. Derating Curves for RT8026 Packages
0.0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
0 153045607590105120135
Ambient Temperature (°C)
Maximum Power Dissipation (W
Four Layers PCB
