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KSZ8721SL-TR
P1-P3
P4-P6
P7-P9
P10-P12
P13-P15
P16-P18
P19-P21
P22-P24
P25-P27
P28-P30
P31-P33
P34-P35
Micrel, Inc.
KS8721BL/SL
June 2009
28
M9999-062509-1.3
End of
Stream
Start of
Stream
Figure 6. 100BASE-T MII Receive Timing
Symbol Parameter
Min
Typ
Max
Units
t
P
RXC
Period
40 ns
t
WL
RXC Pulse Width
20
ns
t
WH
RXC Pulse Width
20
ns
t
SU
RXD [3:0], RXER, RXDV Set-Up to Rising E
dge of RXC
20
ns
t
HD
RXD [3:0], RXER, RXDV Hold from Rising
Edge of RXC
20
ns
t
RLAT
CRS to RXD Latency, 4B or 5B Aligned
6
BT
t
CRS1
“Start of Stream” to CSR Asserted
106
138
ns
t
CRS2
“End of Stream” to CSR De-Asserted
154
186
ns
Table 5. 100BASE-T MII Receive Timing Para
meters
Micrel, Inc.
KS8721BL/SL
June 2009
29
M9999-062509-1.3
Figure 7. Auto-Ne
gotiation/Fast Link
Pulse Timing
Symbol Parameter
Min
Typ
Max
Units
t
BTB
FLP Burst to FLP Burst
8
16
24
ms
t
FLPW
FLP Burst Width
2
ms
t
PW
Clock/Data P
ulse Width
100
ns
t
CTD
Clock Pulse to Data Pulse
69
µs
t
CTC
Clock Pulse to Clock Pulse
Number of Clock/Data Pulses per Burst
17
136
33
µs
µs
Table 6. Auto-Ne
gotiation/Fast Link Puls
e Timing Parameters
Micrel, Inc.
KS8721BL/SL
June 2009
30
M9999-062509-1.3
Figure 8. Serial Management Interface T
iming
Symbol Parameter
Min
Typ
Max
Units
t
P
MDC
Period
400
ns
t
MD1
MDIO Set-Up to MDC (MDIO as Input)
10
ns
t
MD2
MDIO Hold After MDC (MDIO as Input)
10
ns
t
MD3
MDC to MDIO Valid (MDIO as Output)
222
ns
Table 7. Serial Management Interface Timin
g Parameters
P1-P3
P4-P6
P7-P9
P10-P12
P13-P15
P16-P18
P19-P21
P22-P24
P25-P27
P28-P30
P31-P33
P34-P35
KSZ8721SL-TR
Mfr. #:
Buy KSZ8721SL-TR
Manufacturer:
Microchip Technology / Micrel
Description:
Ethernet ICs 10/100 BASE-TX/FX Physical Layer Transceiver
Lifecycle:
New from this manufacturer.
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