25
LTC3732
3732f
The output ripple current is reduced significantly when
compared to the single phase solution using the same
inductance value because the V
OUT
/L discharge currents
term from the stages that has their bottom MOSFETs on
subtract current from the (V
CC
– V
OUT
)/L charging current
resulting from the stage which has its top MOSFET on. The
output ripple current for a 3-phase design is:
I
P-P
=
()()
()
>
V
fL
DC V V
OUT
IN OUT
13 3–
The ripple frequency is also increased by three, further
reducing the required output capacitance when V
CC
< 3V
OUT
as illustrated in Figure 6.
The addition of more phases by phase locking additional
controllers, always results in no net input or output ripple
at V
OUT
/V
IN
ratios equal to the number of stages
implemented. Designing a system with multiple stages
close to the V
OUT
/V
IN
ratio will significantly reduce the
ripple voltage at the input and outputs and thereby
improve efficiency, physical size and heat generation of
the overall switching power supply. Refer to Application
Note 77 for more information on Polyphase circuits.
Efficiency Calculation
To estimate efficiency, the DC loss terms include the input
and output capacitor ESR, each MOSFET R
DS(ON)
, induc-
tor resistance R
L
, the sense resistance R
SENSE
and the
forward drop of the Schottky rectifier at the operating
output current and temperature. Typical values for the
design example given previously in this data sheet are:
Main MOSFET R
DS(ON)
= 7mΩ (9mΩ at 90°C)
Sync MOSFET R
DS(ON)
= 7mΩ (9mΩ at 90°C)
C
INESR
= 20mΩ
C
OUTESR
= 3mΩ
R
L
= 2.5mΩ
R
SENSE
= 3mΩ
V
SCHOTTKY
= 0.8V at 15A (0.7V at 90°C)
V
OUT
= 1.3V
V
IN
= 12V
I
MAX
= 45A
δ = 0.01%°C (MOSFET temperature coefficient)
N = 3
f = 400kHz
The main MOSFET is on for the duty factor V
OUT
/V
IN
and
the synchronous MOSFET is on for the rest of the period
or simply (1 – V
OUT
/V
IN
). Assuming the ripple current is
small, the AC loss in the inductor can be made small if a
good quality inductor is chosen. The average current,
I
OUT
is used to simplify the calaculations. The equation
below is not exact but should provide a good technique
for the comparison of selected components and give a
result that is within 10% to 20% of the final application.
The temperature of the MOSFET’s die temperature may
require interative calculations if one is not familiar typical
performance. A maximum operating junction tempera-
ture of 90° to 100°C for the MOSFETs is recommended
for high reliability applications.
Common output path DC loss:
PN
I
N
RR
C Loss
COMPATH
MAX
L SENSE
OUTESR
≈
+
()
+
2
This totals 3.7W + C
OUTESR
loss.
Total of all three main MOSFET’s DC loss:
PN
V
V
I
N
R
C Loss
MAIN
OUT
IN
MAX
DS ON
INESR
=
+
()
+
2
1 δ
()
This totals 0.66W + C
INESR
loss.
Total of all three synchronous MOSFET’s DC loss:
PN
V
V
I
N
R
SYNC
OUT
IN
MAX
DS ON
=
+
()
11
2
–
()
δ
This totals 5.4W.
APPLICATIO S I FOR ATIO
WUUU
