MAX8533
undervoltage reset monitor at full load. The maximum
gate voltage (V
GS
) rating must be at least ±20V. Low
MOSFET gate capacitance is not necessary for the
inrush current limiting because it is achieved by limiting
the GATE dV/dt. However, higher gate capacitance
increases the turn-off time of the MOSFET under fault
conditions.
Current-Limit and Overload Protection
The MAX8533 features a dual overcurrent protection
circuit that turns off the MOSFET in overcurrent situa-
tions. When an overload event is sensed, the IC limits
the current to a level set by ISET. Continuous overload
for a period set by the user (t
CTIM
) latches off the
MOSFET. The severe overcurrent protection immediate-
ly shuts down the external MOSFET and latches it off.
R3 sets the current-limit threshold voltage. This voltage
is generated from an internal 20µA source driven
through R3. Therefore:
V
ILIM
= R3 x 20µA
The current-sense signal is sensed across resistor R1.
With no load, the voltage at ISET is the input voltage
plus V
ILIM
. As the load current increases, the voltage
drop across R1 increases and reduces the voltage at
ISET. Once V
ISET
is lower than V
IN
, the overcurrent
comparator (Figure 1) is tripped and the MAX8533
enters current regulation mode. During current regula-
tion mode, the gate voltage of the MOSFET is
decreased to limit the current to the output. The maxi-
mum time period for the current regulation mode is set
by the external capacitor at CTIM (C3). This feature
allows transient currents that exceed the current limit to
pass without shutting down the circuit. The current regu-
lation time period is determined as:
t
IREG
= C3 x (1.8V/20µA)
If t
IREG
expires and the overcurrent condition still
exists, the MOSFET is latched off.
The severe overcurrent comparator (Figure 1) trips if
the drop across the current-sense resistor (R1) is
150mV higher than the current-limit threshold (V
IN
exceeds V
ISET
by 150mV). During a severe overcurrent
event, the gate of the external MOSFET is pulled down
with a 350mA current source and latched immediately.
Toggle EN, LPEN, or input power to clear the latched
fault condition.
Overvoltage Protection
The MAX8533 has an adjustable overvoltage protection
feature that latches the IC off in case of an overvoltage
event. An external resistor-divider (R4 and R5, Figure 2)
from OUT to RET with OVP connected to the center,
sets the overvoltage threshold. Use 4.99kΩ for R4. R5
is determined using the following equation:
R5 = 4.99 x 10
3
x ((V
OVT
/ V
OVP
) - 1)
V
OVT
is the desired overvoltage threshold and V
OVP
is
2V (typ). OVP latches off the MAX8533 if an overvoltage
condition exists for 1.5ms. Toggle EN, LPEN, or input
power to clear the latched fault condition.
Fault Reset
Overcurrent, severe overcurrent, and overvoltage con-
ditions result in the MAX8533 entering a latched fault
condition. Toggle LPEN, EN, or input power to reset the
latched fault condition and return to normal operation.
Power-Good Output (POK)
POK is an open-drain output used to enable the on-
board DC-to-DC converter. The POK output turns high
impedance when the output rail reaches 9.6V. POK
must be pulled up to the user’s logic level using a
pullup resistor.
Smallest, Most Reliable, 12V, Infiniband-
Compliant Hot-Swap Controller
8 _______________________________________________________________________________________
PART NO.
