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SI9105DN02-T1-E3

P1-P3P4-P6P7-P9P10-P11
Si9105
Vishay Siliconix
Document Number: 70003
S-42030—Rev. H, 15-Nov-04
www.vishay.com
1
1-W High-Voltage Switchmode Regulator
FEATURES
CCITT Compatible
Current-Mode Control
Low Power Consumption
(less than 5 mW)
10- to 120-V Input Range
200-V, 250-mA MOSFET
Internal Start-Up Circuit
Current-Mode Control
SHUTDOWN and RESET
DESCRIPTION
The Si9105 high-voltage switchmode regulator is a monolithic
BiC/DMOS integrated circuit which contains most of the
components necessary to implement a high-efficiency dc/dc
converter in ISDN terminals up to 3 watts. A 0.5-mA max
supply current makes possible the design of a dc/dc converter
with 60% efficiency at 25 mW, therefore meeting the
recommended performance under the CCITT
I.430 specifications.
This device may be used with an appropriate transformer to
implement isolated flyback power converter topologies to
provide single or multiple regulated dc outputs (i.e., 5 V).
The Si9105 is available in both standard and lead (Pb)-free
16-pin wide-body SOIC, 14-pin plastic DIP and 20-pin PLCC
packages which are specified to operate over the industrial
temperature range of −40
C to 85 C.
FUNCTIONAL BLOCK DIAGRAM
+
−
−
+
+
−
+
−
+
−
FB COMP DISCHARGE
OSC
2 V
Ref
Gen
R
S
Q
R
S
Q
DRAIN
SOURCE
Current-Mode
Comparator
C/L
1.2 V
Undervoltage Comparator
RESET
8.7 V
9.3 V
BIAS
Current
Sources
To
Internal
Circuits
Comparator
Error
Amplifier
V
REF
V
CC
+V
IN
V
CC
SHUTDOWN
4 V (1%)
Clock (½ f
OSC
)
OSC
OUT
OSC
IN
−V
IN
(BODY)
End of Life. Last Available Purchase Date is 31-Dec-2014
Si9105
Vishay Siliconix
www.vishay.com
2
Document Number: 70003
S-42030—Rev. H, 15-Nov-04
ABSOLUTE MAXIMUM RATINGS
Voltages Referenced to −V
IN
(V
CC
< +V
IN
+ 0.3 V)
V
CC
15 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
+V
IN
120 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
V
DS
200 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
I
D
(Peak) (300 s pulse, 2% duty cycle) 2 A. . . . . . . . . . . . . . . . . . . . . . . . . . .
I
D
(rms) 250 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Logic Inputs (RESET,
SHUTDOWN
, OSC IN) −0.3 V to V
CC
+ 0.3 V. . . . . . . . . . . . . . . . . . . . . . . . .
Linear Inputs (FEEDBACK, SOURCE) −0.3 V to 7 V. . . . . . . . . . . . . . . . . . .
HV Pre-Regulator Input Current (continuous) 5 mA. . . . . . . . . . . . . . . . . . . . .
Storage Temperature −65 to 125_C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating Temperature −40 to 85_C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Junction Temperature (T
J
) 150_C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Power Dissipation (Package)
a
14-Pin Plastic DIP (J Suffix)
b
750 mW. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
16-Pin Plastic Wide-Body SOIC (W Suffix)
c
900 mW. . . . . . . . . . . . . . . . . . .
20-Pin PLCC (N Suffix)
d
1400 mW. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Thermal Impedance (
JA
)
14-Pin Plastic DIP 167_C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
16-Pin Plastic Wide-Body SOIC 140_C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
20-Pin PLCC 90_C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Notes
a. Device mounted with all leads soldered or welded to PC board.
b. Derate 6 mW/_C above 25_C
c. Derate 7.2 mW/_C above 25_C
d. Derate 11.2 mW/_C above 25_C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
RECOMMENDED OPERATING RANGE
Voltages Referenced to −V
IN
V
CC
10 V to 13.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
+V
IN
10 V to 120 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
f
OSC
40 kHz to 1 MHz. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
R
OSC
25 k to 1 M. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Linear Inputs 0 to V
CC
− 3 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Digital Inputs 0 to V
CC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SPECIFICATIONS
a
Test Conditions
Unless Otherwise Specified Limits
Parameter Symbol
DISCHARGE = −V
IN
= 0 V
V
CC
= 10 V, +V
IN
= 48 V
R
BIAS
= 820 k , R
OSC
= 910 k
Temp
b
Min
c
Typ
d
Max
c
Unit
Reference
Output Voltage V
R
OSC IN = V
IN
(OSC Disabled)
R
L
= 10 M
Room 3.92 4.00 4.08 V
Output Impedance
e
Z
OUT
OSC IN = −V
IN
Room 15 300 45 k
Short Circuit Current I
SREF
OSC IN = − V
IN
, V
REF
= −V
IN
Room 70 100 130 A
Temperature Stability
e
T
REF
OSC IN = −V
IN
Full 0.25 1.0 mV/_C
Long Term Stability
e
t = 1000 hrs, T
A
= 125_C Room 5.00 25.00 mV
Oscillator
Maximum Frequency
e
f
MAX
R
OSC
= 0 Room 1 3 MHz
Initial Accuracy f
OSC
See Note e Room 32 40 48 kHz
Voltage Stability f/f f/f = f (13.5 V) − f (9.5 V)/f (9.5 V) Room 10 15 %
Temperature Coefficient
e
T
OSC
Full 200 500 ppm/_C
Error Amplifier
Feedback Input Voltage V
FB
FB Tied to COMP
OSC IN = −V
IN
(OSC Disabled)
Room 3.96 4 4.04 V
Input BIAS Current I
FB
OSC IN = −V
IN
, V
FB
= 4 V Room 25 500 nA
Open Loop Voltage Gain
e
A
VOL
OSC IN = −V
IN
(OSC Disabled) Room 60 80 dB
Input Offset Voltage V
OS
Room "15 "40 mV
Unity Gain Bandwidth
e
BW
OSC IN = −V
IN
Room 0.5 0.8 MHz
Dynamic Output Impedance Z
OUT
IN
Room 1 k
Output Current
I
OUT
Source (V
FB
= 3.4 V) Room −1.2 −0.32
mA
Output Current I
OUT
Sink (V
FB
= 4.5 V) Room 0.05 0.08
mA
Power Supply Rejection PSRR 10 V v V
CC
v 13.5 V Room 70 dB
Si9105
Vishay Siliconix
Document Number: 70003
S-42030—Rev. H, 15-Nov-04
www.vishay.com
3
SPECIFICATIONS
a
Parameter Unit
Limits
Test Conditions
Unless Otherwise Specified
DISCHARGE = −V
IN
= 0 V
V
CC
= 10 V, +V
IN
= 48 V
R
BIAS
= 820 k , R
OSC
= 910 kSymbolParameter Unit
Max
c
Typ
d
Min
c
Temp
b
Test Conditions
Unless Otherwise Specified
DISCHARGE = −V
IN
= 0 V
V
CC
= 10 V, +V
IN
= 48 V
R
BIAS
= 820 k , R
OSC
= 910 kSymbol
Current Limit
Threshold Voltage V
SOURCE
R
L
= 100 from DRAIN to V
CC
V
FB
= 0 V
Room 0.8 1.0 1.2 V
Delay to Output
e
t
d
R
L
= 100 from DRAIN to V
CC
V
SOURCE
= 1.5 V, See Figure 1
Room 200 300 ns
Input Voltage +V
IN
I
IN
= 10 A Room 120 V
Input Leakage Current +I
IN
V
CC
w 10 V Room 10 A
Pre-Regulator Start-Up Current I
START
Pulse Width v 300 s, V
CC
= 7 V Room 8 15 mA
V
CC
Pre-Regulator
Turn-Off Threshold Voltage
V
REG
I
PRE-REGULATOR
= 10 A Room 7.5 9.3 9.7
Undervoltage Lockout V
UVLO
R
L
= 100 from DRAIN to V
CC
See Detailed Description
Room 7.0 8.7 9.2
V
V
REG
− V
UVLO
V
DELTA
Room 0.25 0.5
Supply
Supply Current I
CC
Room 0.35 0.5 mA
Bias Current I
BIAS
Room 7.5 A
SHUTDOWN Delay t
SD
V
SOURCE
= −V
IN
, See Figure 2 Room 50 100
SHUTDOWN Pulse Width t
SW
Room 50
RESET Pulse Width t
RW
See Fi
g
ure 3
Room 50
ns
Latching Pulse Width
SHUTDOWN
and RESET Low
t
LW
See Figure 3
Room 25
Input Low Voltage V
IL
Room 2.0
V
Input High Voltage V
IH
Room 8.0
V
Input Current, Input Voltage High I
IH
V
IN
= 10 V Room 1 5
A
Input Current. Input Voltage Low I
IL
V
IN
= 0 V Room −35 −25
A
MOSFET Switch
Breakdown Voltage V(
BR)DSS
I
DRAIN
= 100 A Full 200 220 V
Drain-Source On Resistance
g
r
DS(on)
I
DRAIN
= 100 mA Room 5 7
Drain Off Leakage Current I
DSS
V
DRAIN
= 100 V Room 10 A
Drain Capacitance C
DS
Room 35 pF
Notes
a. Refer to PROCESS OPTION FLOWCHART for additional information.
b. Room = 25_C, Cold and Hot = as determined by the operating temperature suffix.
c. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
d. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
e. Guaranteed by design, not subject to production test.
f. C
STRAY
Pin 8 = v 5 pF
g. Temperature coefficient of r
DS(on)
is 0.75% per _C, typical.
P1-P3P4-P6P7-P9P10-P11

SI9105DN02-T1-E3

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Manufacturer:
Vishay
Description:
IC REG FLYBACK INV 20PLCC
Lifecycle:
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