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AD73360ASUZ

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36
a
AD73360
Six-Input Channel
Analog Front End
FEATURES
Six 16-Bit A/D Converters
Programmable Input Sample Rate
Simultaneous Sampling
77 dB SNR
64 kS/s Maximum Sample Rate
–
83 dB Crosstalk
Low Group Delay (25 ␮s Typ per ADC Channel)
Programmable Input Gain
Flexible Serial Port which Allows Multiple Devices to
Be Connected in Cascade
Single (+2.7 V to +5.5 V) Supply Operation
80 mW Max Power Consumption at +2.7 V
On-Chip Reference
28-Lead SOIC and 44-Lead TQFP Packages
APPLICATIONS
General Purpose Analog Input
Industrial Power Metering
Motor Control
Simultaneous Sampling Applications
FUNCTIONAL BLOCK DIAGRAM
VINN1
VINP1
ANALOG
⌺-⌬
MODULATOR
SDI
SDIFS
SCLK
REFCAP
REFOUT
SE
RESET
SDOFS
SDO
MCLK
VINN2
VINP2
VINN3
VINP3
VINN4
VINP4
VINN5
VINP5
VINN6
VINP6
AD73360
SIGNAL
CONDITIONING
0/38dB
PGA
DECIMATOR
SERIAL
I/O
PORT
ANALOG
⌺-⌬
MODULATOR
SIGNAL
CONDITIONING
0/38dB
PGA
DECIMATOR
ANALOG
⌺-⌬
MODULATOR
SIGNAL
CONDITIONING
0/38dB
PGA
DECIMATOR
ANALOG
⌺-⌬
MODULATOR
SIGNAL
CONDITIONING
0/38dB
PGA
DECIMATOR
ANALOG
⌺-⌬
MODULATOR
SIGNAL
CONDITIONING
0/38dB
PGA
DECIMATOR
ANALOG
⌺-⌬
MODULATOR
SIGNAL
CONDITIONING
0/38dB
PGA
DECIMATOR
REFERENCE
GENERAL DESCRIPTION
The AD73360 is a six-input channel analog front-end processor
for general purpose applications including industrial power
metering or multichannel analog inputs. It features six 16-bit
A/D conversion channels each of which provide 77 dB signal-to-
noise ratio over a dc to 4 kHz signal bandwidth. Each channel
also features a programmable input gain amplifier (PGA) with
gain settings in eight stages from 0 dB to 38 dB.
The AD73360 is particularly suitable for industrial power me-
tering as each channel samples synchronously, ensuring that there
is no (phase) delay between the conversions. The AD73360 also
features low group delay conversions on all channels.
An on-chip reference voltage is included and is programmable
to accommodate either 3 V or 5 V operation.
The sampling rate of the device is programmable with four
separate settings offering 64 kHz, 32 kHz, 16 kHz and 8 kHz
sampling rates (from a master clock of 16.384 MHz).
A serial port (SPORT) allows easy interfacing of single or cas-
caded devices to industry standard DSP engines. The SPORT
transfer rate is programmable to allow interfacing to both fast
and slow DSP engines.
The AD73360 is available in 28-lead SOIC and 44-lead TQFP
packages.
Rev. B Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2000–2015 Analog Devices, Inc. All rights reserved.
Technical Support www.analog.com
AD73360* PRODUCT PAGE QUICK LINKS
Last Content Update: 02/23/2017
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DOCUMENTATION
Application Notes
• AN-349: Keys to Longer Life for CMOS
Data Sheet
• AD73360: Six-Input Channel Analog Front End Data Sheet
• AD73360: Errata Sheet for Cascade Mode Operation
REFERENCE MATERIALS
Technical Articles
• MS-2210: Designing Power Supplies for High Speed ADC
DESIGN RESOURCES
• AD73360 Material Declaration
• PCN-PDN Information
• Quality And Reliability
• Symbols and Footprints
DISCUSSIONS
View all AD73360 EngineerZone Discussions.
SAMPLE AND BUY
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TECHNICAL SUPPORT
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number.
DOCUMENT FEEDBACK
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This page is dynamically generated by Analog Devices, Inc., and inserted into this data sheet. A dynamic change to the content on this page will not
trigger a change to either the revision number or the content of the product data sheet. This dynamic page may be frequently modified.
REV. B
–2–
AD73360–SPECIFICATIONS
1
(AVDD = 3 V ⴞ 10%; DVDD = 3 V ⴞ 10%; DGND = AGND = 0 V, f
MCLK
= 16.384 MHz,
f
SCLK
= 8.192 MHz, f
S
= 8 kHz; T
A
= T
MIN
to T
MAX
, unless otherwise noted.)
AD73360A
Parameter Min Typ Max Unit Test Conditions/Comments
REFERENCE
REFCAP
Absolute Voltage, V
REFCAP
1.125 1.25 1.375 V 5VEN = 0
REFCAP TC 50 ppm/°C 0.1 µF Capacitor Required from REFCAP
to AGND2
REFOUT
Typical Output Impedance 130 Ω
Absolute Voltage, V
REFOUT
1.125 1.25 1.375 V Unloaded
Minimum Load Resistance 1 kΩ
Maximum Load Capacitance 100 pF
ADC SPECIFICATIONS
Maximum Input Range at VIN
2, 3
1.644 V p-p 5VEN = 0, Measured Differentially
–2.85 dBm
Nominal Reference Level at VIN 1.1413 V p-p 5VEN = 0, Measured Differentially
(0 dBm0) –6.02 dBm
Absolute Gain
PGA = 0 dB –0.8 +0.8 dB 1.0 kHz
PGA = 38 dB –0.8 +0.8 dB 1.0 kHz
Gain Tracking Error ± 0.1 dB 1.0 kHz, +3 dBm0 to –50 dBm0
Signal to (Noise + Distortion)
PGA = 0 dB 73 77 dB 0 Hz to 4 kHz; f
S
= 8 kHz
PGA = 38 dB 62 dB 0 Hz to 4 kHz; f
S
= 64 kHz
Total Harmonic Distortion
PGA = 0 dB –83 –76 dB
PGA = 38 dB –70 dB
Intermodulation Distortion –76 dB PGA = 0 dB
Idle Channel Noise –70 dB PGA = 0 dB
Crosstalk ADC-to-ADC –83 dB ADC1 Input Signal Level: 1.0 kHz
ADC2 Input at Idle
DC Offset –30 +10 +45 mV PGA = 0 dB
Power Supply Rejection –55 dB Input Signal Level at AVDD and DVDD
Pins 1.0 kHz, 100 mV p-p Sine Wave
Group Delay
4, 5
25 µs 64 kHz Output Sample Rate
50 µs 32 kHz Output Sample Rate
95 µs 16 kHz Output Sample Rate
190 µs 8 kHz Output Sample Rate
Input Resistance at VIN
2, 4
25 kΩ
6
DMCLK = 16.384 MHz
FREQUENCY RESPONSE
(ADC)
7
Typical Output
Frequency (Normalized to f
S
)
00dB
0.03125 –0.1 dB
0.0625 –0.25 dB
0.125 –0.6 dB
0.1875 –1.4 dB
0.25 –2.8 dB
0.3125 –4.5 dB
0.375 –7.0 dB
0.4375 –9.5 dB
> 0.5 < –12.5 dB
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36

AD73360ASUZ

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Manufacturer:
Analog Devices Inc.
Description:
Analog Front End - AFE IC 6-CH AFE Processor
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