PI6C185-00QE

1
PS8317F 11/13/08
Pin ConfigurationBlock Diagram
Description
The PI6C185-00 is a high-speed low-noise 1-7 non-inverting
buffer designed for SDRAM clock buffer applications.
This buffer is intended to be used with the PI6C10X clock genera-
tor for Intel Architecture-based Mobile systems.
At power up all SDRAM output are enabled and active. The I
2
C
Serial control may be used to individually activate/deactivate any
of the 7 output drivers.
Note:
Purchase of I
2
C components from Pericom conveys a license to use
them in an I
2
C system as defined by Philips.
SDRAM6
SDRAM2
SDRAM1
SDRAM0
BUF_IN
SDATA
SCLOCK
SDRAM3
I
2
C
I/O
Features
High-speed, low-noise non-inverting 1-7 buffer
Switching speed up to 128 MHz
Supports up to three mobile SDRAM DIMMs
Low skew (<250ps) between any two output clocks
I
2
C Serial Configuration interface
Multiple V
DD
, V
SS
pins for noise reduction
3.3V power supply voltage
Packaging (Pb-free & Green available):
- 20-pin QSOP (Q)
Precision 1-7 Clock Buffer
PI6C185-00
1
2
3
V
SS 4
BUF_IN
5
SDRAM1
6
SDRAM2
7
V
SS 8
V
DD
9
SDATA
10
V
DD
SDRAM5
V
SS
SDRAM4
SDRAM3
V
SS
V
SS
20
SCLK
19
18
17
16
15
14
13
12
11
V
DD
SDRAM0
V
DD
V
DD
SDRAM6
08-0298
PI6C185-00
Precision 1-7 Clock Buffer
2
PS8317F 11/13/08
Pin Description
PI6C185-00 I
2
C Address Assignment
PI6C185 Serial Configuration Map
Byte0: SDRAM Active/Inactive Register
(1 = enable, 0 = disable)
Note:
Inactive means outputs are held LOW and are disabled from
switching
6A5A4A3A2A1A0AW/R
11010 0 1 0
tiB#niPnoitpircseD
7tiB51)evitcanI/evitcA(4MARDS
6tiB41)evitcanI/evitcA(3MARDS
5tiB- )0otezilaitinI(CN
4tiB7 )evitcanI/evitcA(2MARDS
3tiB-
)0otezilaitinI(CN
2tiB- )0otezilaitinI(CN
1tiB3 )evitcanI/evitcA(1MARDS
0tiB2 )evitcanI/evitcA(0MARDS
Byte1: SDRAM Active/Inactive Register
(1 = enable, 0 = disable)
tiB#niPnoitpircseD
7tiB- )0otezilaitinI(CN
6tiB- )0otezilaitinI(CN
5tiB- )0otezilaitinI(CN
4tiB- )0otezilaitinI(CN
3tiB- )0otezilaitinI(CN
2tiB-
)0otezilaitinI(CN
1tiB91)evitcanI/evitcA(6MARDS
0tiB81)evitcanI/evitcA(5MARDS
niPlangiSepyT.ytQnoitpircseD
91,81,51,41,7,3,2]6.0[MARDSI7 stuptuOkcolCdereffuB
5NI_FUBI1 tupnIreffuBkcolC
01ATADSO/I1 IrofataDlaireS
2
.pu-lluplanretni,ecafretniC
11KLCSI1 IrofkcolClaireS
2
pu-lluplanretni,ecafretniC
02,61,9,6,1V
DD
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71,31,21,8,4V
SS
dnuorG5dnuorG
08-0298
PI6C185-00
Precision 1-7 Clock Buffer
3
PS8317F 11/13/08
2-Wire I
2
C Control
The I
2
C interface permits individual enable/disable of each clock
output and test mode enable.
The PI6C185-00 is a slave receiver device. It can not be read back.
Sub addressing is not supported. To change one of the control
bytes, all preceding bytes must be sent.
Every bite put on the SDATA line must be 8-bits long (MSB first),
followed by an acknowledge bit generated by the receiving device.
During normal data transfers SDATA changes only when SCLK is
LOW. Exceptions: A HIGH to LOW transition on SDATA while
SCLK is HIGH indicates a “start” condition. A LOW to HIGH
transition on SDATA while SCLK is HIGH is a “stop” condition
and indicates the end of a data transfer cycle.
Each data transfer is initiated with a start condition and ended with
a stop condition. The first byte after a start condition is always a
7-bit address byte followed by a read/write bit. (HIGH = read from
addressed device, LOW = write to addressed device). If the
device’s own address is detected, PI6C185-00 generates an
acknowledge by pulling SDATA line LOW during ninth clock
pulse, then accepts the following data bytes until another start or
stop condition is detected.
Following acknowledgement of the address byte (0D2H), two
more bytes must be sent:
1. “Command Code” byte, and
2. “Byte Count” byte.
Although the data bits on these two bytes are “don’t care,” they
must be sent and acknowledged.
Storage Temperature ......................................... –65°C to +150°C
Ambient Temperature with Power Applied ......... –40°C to +85°C
3.3V Supply Voltage to Ground Potential ............. –0.5V to +4.6V
DC Input Voltage .................................................. –0.5V to +4.6V
Note:
Stresses greater than those listed under MAXIMUM RATINGS
may cause permanent damage to the device. This is a stress rating
only and functional operation of the device at these or any other
conditions above those indicated in the operational sections of this
specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
Supply Current (V
DD
= +3.465V, C
LOAD
= Max.)
lobmySretemaraPnoitidnoCtseT.niM.pyT.xaMstinU
I
DD
tnerruCylppuSzHM0=NI_FUB3
Am
I
DD
tnerruCylppuSzHM66.66=NI_FUB58
I
DD
tnerruCylppuSzHM0.001=NI_FUB031
I
DD
tnerruCylppuSzHM3.331=NI_FUB022
Maximum Ratings
(Above which the useful life may be impaired.
For user guidelines, not tested.)
08-0298

PI6C185-00QE

Mfr. #:
Manufacturer:
Diodes Incorporated
Description:
Clock Buffer Precision 1:7 Clock Driver
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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