6
FN2919.9
April 26, 2007
Application Information
Static Protection
All devices are static protected by the use of input diodes.
However, strong static fields should be avoided, as it is
possible for the strong fields to cause degraded diode
junction characteristics, which may result in increased input
leakage currents.
Latchup Avoidance
Junction-isolated CMOS circuits employ configurations which
produce a parasitic 4-layer (PNPN) structure. The 4-layer
structure has characteristics similar to an SCR, and under
certain circumstances may be triggered into a low impedance
state resulting in excessive supply current. To avoid this
condition, no voltage greater than 0.3V beyond the supply
rails may be applied to any pin. In general, the op amp
supplies must be established simultaneously with, or before
any input signals are applied. If this is not possible, the drive
circuits must limit input current flow to 2mA to prevent latchup.
Choosing the Proper I
Q
The ICL7611 and ICL7612 have a similar I
Q
set-up scheme,
which allows the amplifier to be set to nominal quiescent
currents of 10μA, 100μA or 1mA. These current settings
change only very slightly over the entire supply voltage
range. The ICL7611 and ICL7612 have an external I
Q
control terminal, permitting user selection of quiescent
current. To set the I
Q
connect the I
Q
terminal as follows:
I
Q
= 10μA - I
Q
pin to V+
I
Q
= 100μA - I
Q
pin to ground. If this is not possible, any
voltage from V+ - 0.8 to V- +0.8 can be used.
I
Q
= 1mA - I
Q
pin to V-
NOTE: The output current available is a function of the quiescent
current setting. For maximum peak-to-peak output voltage swings
into low impedance loads, IQ of 1mA should be selected.
Output Stage and Load Driving Considerations
Each amplifiers’ quiescent current flows primarily in the
output stage. This is approximately 70% of the I
Q
settings.
This allows output swings to almost the supply rails for
output loads of 1MΩ, 100kΩ, and 10kΩ, using the output
stage in a highly linear class A mode. In this mode,
crossover distortion is avoided and the voltage gain is
maximized. However, the output stage can also be operated
in Class AB for higher output currents. (See graphs under
Typical Operating Characteristics). During the transition from
Class A to Class B operation, the output transfer
characteristic is non-linear and the voltage gain decreases.
Input Offset Nulling
Offset nulling may be achieved by connecting a 25k pot
between the BAL terminals with the wiper connected to V+.
At quiescent currents of 1mA and 100μA the nulling range
provided is adequate for all V
OS
selections; however with
I
Q
=10μA, nulling may not be possible with higher values
of V
OS
.
Frequency Compensation
The ICL7611 and ICL7612 are internally compensated, and
are stable for closed loop gains as low as unity with
capacitive loads up to 100pF.
Extended Common Mode Input Range
The ICL7612 incorporates additional processing which
allows the input CMVR to exceed each power supply rail by
0.1V for applications where V
SUPP
≥ ±1.5V. For those
applications where V
SUPP
≤ ±1.5V the input CMVR is limited
in the positive direction, but may exceed the negative supply
rail by 0.1V in the negative direction (e.g., for V
SUPPLY
= ±1V,
the input CMVR would be +0.6V to -1.1V).
Operation At V
SUPPLY
= ±1V
Operation at V
SUPPLY
= ±1V is guaranteed at I
Q
= 10μA for
A and B grades only.
Output swings to within a few millivolts of the supply rails are
achievable for R
L
≥ 1MΩ. Guaranteed input CMVR is ±0.6V
minimum and typically +0.9V to -0.7V at V
SUPPLY
= ±1V. For
applications where greater common mode range is
desirable, refer to the description of ICL7612 above.
Typical Applications
The user is cautioned that, due to extremely high input
impedances, care must be exercised in layout, construction,
board cleanliness, and supply filtering to avoid hum and
noise pickup.
Note that in no case is I
Q
shown. The value of I
Q
must be
chosen by the designer with regard to frequency response
and power dissipation.
ICL7612
+
-
V
IN
V
OUT
R
L
≥10k
FIGURE 1. SIMPLE FOLLOWER (NOTE 4)
ICL7612
+
-
V
IN
V
OUT
100k
+5 +5
1M
TO CMOS OR
LPTTL LOGIC
NOTE:
4. By using the ICL7612 in this application, the circuit will follow rail
to rail inputs.
FIGURE 2. LEVEL DETECTOR (NOTE 4)
ICL7611, ICL7612
