AD8479 Data Sheet
Rev. A | Page 12 of 16
APPLICATIONS INFORMATION
BASIC CONNECTIONS
Figure 34 shows the basic connections for operating the
AD8479 with a dual supply. A supply voltage from ±2.5 V to
±18 V is applied across Pin 7 and Pin 4. Both supplies should be
decoupled close to the pins using 0.1 μF capacitors. Electrolytic
capacitors of 10 μF, also located close to the supply pins, may be
required if low frequency noise is present on the power supply.
Although multiple amplifiers can be decoupled by a single set of
10 μF capacitors, each AD8479 should have its own set of 0.1 μF
capacitors so that the decoupling point can be located directly at
the IC power pins.
REF(–)
REF(+)
–V
S
–V
S
+V
S
+V
S
V
OUT
= I
SHUNT
× R
SHUNT
NC
–IN
+IN
R
SHUNT
I
SHUNT
(SEE
TEXT)
(SEE
TEXT)
0.1µF
0.1µF
+2.5V TO +18V
–2.5V TO –18V
NC = NO CONNECT
AD8479
1
2
3
4
8
7
6
5
11118-034
Figure 34. Basic Connections
The differential input signal, which typically results from a
load current flowing through a small shunt resistor, is applied to
Pin 2 and Pin 3 with the polarity shown in Figure 34 to obtain a
positive gain. The common-mode voltage on the differential
input signal can range from −600 V to +600 V, and the maximum
differential voltage is ±14.7 V. When configured as shown in
Figure 34, the device operates as a simple gain-of-1, differential-
to-single-ended amplifier; the output voltage is the shunt resistance
times the shunt current. The output is measured with respect to
Pin 1 and Pin 5.
Pin 1 and Pin 5 (REF(−) and (REF(+)) should be grounded for a
gain of unity and should be connected to the same low impedance
ground plane. Failure to do this results in degraded common-mode
rejection. Pin 8 is a no connect pin and should be left open.
SINGLE-SUPPLY OPERATION
Figure 35 shows the connections for operating the AD8479 with
a single supply. Because the output can swing to within only about
0.3 V of either rail, an offset must be applied to the output. This
offset can be applied by connecting REF(+) and REF(−) to a low
impedance reference voltage that is capable of sinking current
(some ADCs provide this voltage as an output). Therefore, for
a single supply of 10 V, V
REF
can be set to 5 V for a bipolar input
signal, allowing the output to swing 9.4 V p-p around the
central 5 V reference voltage. For unipolar input signals, V
REF
can be set to approximately 1 V, allowing the output to swing
from 1 V (for a 0 V input) to within 0.3 V of the positive rail.
REF(–)
REF(+)
–V
S
V
Y
V
X
+V
S
+V
S
NC
–IN
+IN
R
SHUNT
I
SHUNT
0.1µF
NC = NO CONNECT
AD8479
1
2
3
4
8
7
6
5
OUTPUT = V
OUT
– V
REF
V
REF
111
18-035
Figure 35. Operation with a Single Supply
When the AD8479 is operated with a single supply and a
reference voltage is applied to REF(+) and REF(−), the input
common-mode voltage range of the AD8479 is reduced. The
reduced input common-mode range depends on the voltage at
the inverting and noninverting inputs of the internal op amp,
labeled V
X
and V
Y
in Figure 35. These nodes can swing to within
1 V of either rail. Therefore, for a single supply voltage of 10 V,
V
X
and V
Y
can have a value from 1 V to 9 V. If V
REF
is set to 5 V,
the allowable common-mode voltage range is +245 V to −235 V.
The common-mode voltage range can be calculated as follows:
V
CM
(±) = 60 × (V
X
or V
Y
(±)) − (59 × V
REF
)
SYSTEM-LEVEL DECOUPLING AND GROUNDING
The use of ground planes is recommended to minimize the
impedance of ground returns and, therefore, the size of dc errors.
Figure 36 shows how to use grounding in a mixed-signal environ-
ment, that is, with digital and analog signals present. To isolate
low level analog signals from a noisy digital environment, many
data acquisition components have separate analog and digital
ground returns. All ground pins from mixed-signal components,
such as ADCs, should return through a low impedance analog
ground plane. Digital ground lines of mixed-signal converters
should also be connected to the analog ground plane.
ANALOG POWER
SUPPLY
DIGITAL
POWER SUPPLY
0.1µF
0.1µF
0.1µF0.1µF
+IN
–IN
–V
S
V
IN1
V
IN2
V
DD
V
DD
OUTPUT
AGND
GND
MICROPROCESSOR
DGND
+V
S
AD8479
ADC
REF(–) REF(+)
74
3
2
6
1
5
12
+5V GND
+5VGND
–5V
11118-036
Figure 36. Optimal Grounding Practice for a Dual Supply Environment
with Separate Analog and Digital Supplies
