74LCX646WM Datasheet 74LCX646MTCX, 74LCX646MSA, 74LCX646MSAX | P1-P3

February 1994

Revised March 2001

74LCX646 Low Voltage Octal Transceiver/Register with 5V Tolerant Inputs and Outputs

74LCX646

Low Voltage Octal Transceiver/Register

with 5V Tolerant Inputs and Outputs

General Description

The LCX646 consists of registered bus transceiver circuits,

D-type flip-flops, and control circuitry providing multiplexed

transmission of data directly from the input bus or from the

internal storage registers. Data on the A or B bus will be

loaded into the respective registers on the LOW-to-HIGH

transition of the appropriate pin (CPAB or CPBA) (see

Functional Description).

The LCX646 is designed for low voltage (2.5V or 3.3V) V

applications with capability of interfacing to a 5V signal

environment.

The LCX646 is fabricated with an advanced CMOS tech-

nology to achieve high speed operation while maintaining

CMOS low power dissipation.

Features

■ 5V tolerant inputs and outputs

■ 2.3V

− 3.6V V

specifications provided

■ 7.0 ns t

max (V

= 3.3V), 10 µA I

max

■ Power down high impedance inputs and outputs

■ Supports live insertion/withdrawal (Note 1)

■

±24 mA output drive (V

= 3.0V)

■ Implements patented noise/EMI reduction circuitry

■ Latch-up performance exceeds 500 mA

■ ESD performance:

Human body model

> 2000V

Machine model

> 200V

Note 1: To ensure the high-impedance state during power up or down, OE

should be tied to V

through a pull-up resistor: the minimum value or the

resistor is determined by the current-sourcing capability of the driver.

Ordering Code:

Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Connection Diagram Pin Descriptions

Order Number Package Number Package Description

74LCX646WM M24B 24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide

74LCX646MSA MSA24 24-Lead Shrink Small Outline Package (SSOP), EIAJ TYPE II, 5.3mm Wide

74LCX646MTC MTC24 24-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

Pin Names Description

–A

Data Register A Inputs

Data Register A Outputs

–B

Data Register B Inputs

Data Register B Outputs

CPAB, CPBA Clock Pulse Inputs

SAB, SBA Transmit/Receive Inputs

Output Enable Input

DIR Direction Control Input

www.fairchildsemi.com 2

74LCX646

Logic Symbols

IEEE/IEC

Truth Table

(Note 2)

H = HIGH Voltage Level

L = LOW Voltage Level

X = Immaterial

= LOW-to-HIGH Transition

Note 2: The data output functions may be enabled or disabled by various signals at the OE

and DIR inputs. Data input functions are always enabled;

i.e., data at the bus pins will be stored on every LOW-to-HIGH transition of the appropriate clock inputs.

Inputs Data I/O

Function

DIR CPAB CPBA SAB SBA A

–A

–B

H X H or L H or L X X Isolation

X X X Input Input Clock A

Data into A Register

HXX

X X Clock B

Data into B Register

LHXXLX A

to B

—Real Time (Transparent Mode)

X L X Input Output Clock A

Data into A Register

L H H or L X H X A Register to B

(Stored Mode)

X H X Clock A

Data into A Register and Output to B

LLXXXL B

to A

—Real Time (Transparent Mode)

LLX

X L Output Input Clock B

Data into B Register

L L X H or L X H B Register to A

(Stored Mode)

LLX

X H Clock B

Data into B Register and Output to A

3 www.fairchildsemi.com

74LCX646

Functional Description

In the transceiver mode, data present at the HIGH imped-

ance port may be stored in either the A or B register or

both. The select (SAB, SBA) controls can multiplex stored

and real-time. The examples shown below demonstrate the

four fundamental bus-management functions that can be

performed.

The direction control (DIR) determines which bus will

receive data when OE

is LOW. In the isolation mode (OE

HIGH), A data may be stored in one register and/or B data

may be stored in the other register. When an output func-

tion is disabled, the input function is still enabled and may

be used to store and transmit data. Only one of the two

busses, A or B, may be driven at a time.

Real-Time Transfer

Bus B to Bus A

Real-Time Transfer

Bus A to Bus B

Transfer Storage

Data to A or B

Storage

DIR CPAB CPBA SAB SBA

LL X X X L

OE DIR CPAB CPBA SAB SBA

LHXXLX

OE DIR CPAB CPBA SAB SBA

LLXH or LX H

LHH or LXHX

OE DIR CPAB CPBA SAB SBA

XLX

LLX

XXX

HXX

P1-P3 P4-P6 P7-P9 P10-P10

74LCX646WM

Mfr. #:

Buy 74LCX646WM

Manufacturer:

ON Semiconductor

Description:

IC TXRX NON-INVERT 3.6V 24SOIC

Lifecycle:

New from this manufacturer.

Delivery:

DHL FedEx Ups TNT EMS

Payment:

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74LCX646WM

74LCX646WM

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