RT8204A
16
DS8204A-05 April 2011www.richtek.com
Find a low pass inductor having the lowest possible DC
resistance that fits in the allowed dimensions. Ferrite cores
are often the best choice, although powdered iron is
inexpensive and can work well at 200kHz. The core must
be large enough and not to saturate at the peak inductor
current (I
PEAK
) :
I
PEAK
= I
LOAD(MAX)
+ [(L
IR
/ 2) x I
LOAD(MAX)
]
Output Capacitor Selection
The output filter capacitor must have ESR low enough to
meet output ripple and load transient requirement, yet have
high enough ESR to satisfy stability requirements. Also,
the capacitance value must be high enough to absorb the
inductor energy going from a full-load to no-load condition
without tripping the OVP circuit.
For CPU core voltage converters and other applications
where the output is subject to violent load transient, the
output capacitor's size depends on how much ESR is
needed to prevent the output from dipping too low under a
load transient. Ignoring the sag due to finite capacitance :
P-P
LOAD(MAX)
V
ESR
I
≤
In non-CPU applications, the output capacitor's size
depends on how much ESR is needed to maintain at an
acceptable level of output voltage ripple :
P-P
IR LOAD(MAX)
V
ESR
LI
≤
×
SW
ESR
OUT
f
1
f =
2 ESR C 4
π
≤
×× ×
Organic semiconductor capacitors or specially polymer
capacitors are recommended.
Output Capacitor Stability
Stability is determined by the value of the ESR zero relative
to the switching frequency. The point of instability is given
by the following equation :
Do not put high-value ceramic capacitors directly across
the outputs without taking precautions to ensure stability.
Large ceramic capacitors can have a high ESR zero
frequency and cause erratic and unstable operation.
However, it is easy to add sufficient series resistance by
placing the capacitors a couple of inches downstream from
the inductor and connecting V
OUT
or FB divider close to
the inductor.
There are two related but distinct ways including double-
pulsing and feedback loop instability to identify the
unstable operation.
Double-pulsing occurs due to noise on the output or
because the ESR is too low that there is not enough
voltage ramp in the output voltage signal. The “fools” the
error comparator into triggering a new cycle immediately
after 400ns minimum off-time period has expired. Double-
pulsing is more annoying than harmful, resulting in nothing
worse than increased output ripple. However, it may
indicate the possible presence of loop instability, which
is caused by insufficient ESR.
Loop instability can result in oscillation at the output after
line or load perturbations that can trip the over voltage
protection latch or cause the output voltage to fall below
the tolerance limit.
The easiest method for stability checking is to apply a
very zero-to-max load transient and carefully observe the
output-voltage-ripple envelope for overshoot and ringing. It
helps to simultaneously monitor the inductor current with
AC probe. Do not allow more than one ringing cycle after
the initial step-response under- or over-shoot.
LDO Normal Operation
The RT8204A LDO controls an N-MOSFET to produce a
tightly regulated output voltage from higher supply voltage.
It takes 5V power supply for controller and draws maximally
400μA while operating.
The feedback voltage is regulated to compare with the
internal 0.75V reference voltage. To set the output voltage,
feedback the conjunction of a resistor voltage divider from
output node to ground for the LFB pin.
Depending upon the input voltage used for the device, the
LDRV pin can be pulled up near to VDD. Thus the device
can be used to regulate a large range of output voltage by
careful selection of the external MOSFETs.
A built-in active high enable control (LEN pin) is used to
turn the RT8204A LDO on. If this pin is pulled low, the
LDRV pin is pulled low, turning off the N-MOSFET. If this
pin is pulled higher than 2V, the LDRV pin is enabled.
