kHz Range Crystal Devices
Digital Temperature Compensated Crystal Oscillator
Surface Mount Type DTCXO KT3225T Series
CMOS/ 3.0V Typ./ 3.2
×
2.5mm
RoHS Compliant
How to Order
Frequency Tolerance (vs Temp.) :
±
3.8
×
10
−
6
/
−
10
°
C to 60
°
C
KT3225T
32768
D G R 30 T xx
① ② ③ ④ ⑤ ⑥ ⑦ ⑧
Frequency Tolerance (vs Temp.) :
±
5.0
×
10
−
6
/
−
40
°
C to 85
°
C
KT3225T
32768
E A W 30 T xx
① ② ③ ④ ⑤ ⑥ ⑦ ⑧
①
Series
②
Output Frequency
③
Frequency Stability
A
No Temp. Compensated
D
±
3.8
×
10
−6
E
±
5.0
×
10
−6
④
Lower Temperature
A
−
40
°
C
G
−
10
°
C
⑥
Supply Voltage
30 3.0V
33 3.3V
50 5.0V
⑤
Upper Temperature
W
+
85
°
C
R
+
60
°
C
⑦
Initial Frequency
Tolerance
A 5
±
5
×
10
−6
B 0
±
5
×
10
−6
T
±
3.0
×
10
−6
⑧
Option Code
Packaging (Tape & Reel 3000 pcs./ reel)
Features
• Miniature SMD type (3.2
×
2.5
×
1.0mm)
• 32.768kHz D-TCXO
• High frequency stability :
±
5.0x10
−6
/ −40
to
+
85
°
C
• Low supply current : 1.5
μ
A typ (VDD
=
3.0V,
Output at no load)
• Temperature compensated voltage
Range : 2.0V to 5.5V
• Operating Temp. −40 to
+
105
°
C (option)
• AEC-Q200 qualied
Applications
• High accuracy time references
• Microcontroller with built in RTC
Specifications
Item Symbol Conditions
Specifications
Units
Min. Typ. Max.
Nominal Frequency f_
nom
―
32.768
―
kHz
Oscillation Output Voltage V
DD 1.3 3.0 5.5 V
Temperature Compensated Voltage
VTEM 2.0 3.0 5.5 V
Storage Temperature T_
stg −40
+
25
+
85
°
C
Operating Temperature T_
use −40
+
25
+
85
°
C
Initial Frequency Tolerance
―
Ta
=
25
±
2
°
C −3.0
―
+
3.0
×
10
−6
Frequency Stability vs Temp. fo-Tc E : Ta
=
−40 to
+
85
°
C −5.0
―
+
5.0
×
10
−6
Frequency Stability vs Supply Voltage
df/ fo VDD
=
2.0 to 5.5V, Ta
=
25
±
2
°
C −1.0
―
+
1.0
×
10
−6
/ V
Frequency Aging f
_age −3.0
―
+
3.0
×
10
−6
Low Level Output Voltage VOL IOL
=+
1.0mA, V
DD
=
3V 0.0
―
0.8 V
High Level Output Voltage V
OH IOH
=
−1.0mA, V
DD
=
3V 2.2
―
3.0 V
Low Level Input Voltage V
IL CLKOE pin 0.0
―
0.2
×
VDD V
High Level Input Voltage V
IH CLKOE pin 0.8
×
VDD
―
5.5 V
DUTY Ratio Duty CL
=
15pF 40
―
60 %
Rise Time tr 20%V
DD
→
80%V
DD, CL
=
15pF, VDD
=
3V
― ―
100 nsec
Fall Time tf 80%V
DD
→
20%V
DD, CL
=
15pF, VDD
=
3V
― ―
100 nsec
Start-up Time t_
str
Ta
=
25
°
C
― ―
1.0 sec
Ta
=
−40 to 85
°
C
― ―
3.0 sec
Power Supply Current1 I
CC1 CLKOE
=
VSS, VDD
=
3V
―
0.6 2.0
μ
A
Power Supply Current2 I
CC2
CLKOE
=
V
DD, VDD
=
3V, Output at no load
―
1.5 4.0
μ
A
CLKOE
=
V
DD, VDD
=
3V, CL
=
15pF
―
2.7 5.5
μ
A
Output Load Condition L_CMOS CMOS Output
― ―
15.0 pF
*
Please contact us for other specifications.
3.2±0.2
2.5±0.2
#1 #2 #3 #4
#7#8 #6 #5
1.0 max.
0.27
0.7 1.1
Pin No Function
#1 CLKOE
#2
N.C
#3
N.C
#4 VSS
#5
CLKOUT
#6 N.C
#7
N.C
#8
VDD
0.35
C0.15
0.50.4
#7#8 #6 #5
0.5
0.50.45
R0.15
#1 #2 #3 #4
K
Enable/ Disable Function
#1 #5
(
Output
)
"H" Level Oscillation
"L" Level High Z
Dimensions (Unit: mm)
Note: A capacitor of value 0.01µF between VDD
and GND is recommended.
0.85
0.550.55 0.60.6
0.85
0.40.4 0.4
1.1
0.5
Recommended Land Pattern (Unit: mm)
