MT46H32M32LFCG-5 IT:A TR Datasheet MT46H32M32LFCG-5 IT:A, MT46H32M32LFCG-5 IT:A TR, MT46H32M32LFCG-6 IT:A | P1-P3

PDF: 09005aef833913f1/Source: 09005aef833913d6 Micron Technology, Inc., reserves the right to change products or specifications without notice.

ddr_mobile_sdram_only_152b_omap_pop.fm - Rev. E 06/09 EN

152-Ball x32 Mobile LPDDR (only) PoP (TI-OMAP)

Features

Mobile LPDDR (only)

152-Ball Package-on-Package (PoP) TI-OMAP™

MT46HxxxMxxLxCG

MT46HxxxMxxLxKZ

Features

•V

DDQ

= 1.70–1.95V

• Bidirectional data strobe per byte of data (DQS)

• Internal, pipelined double data rate (DDR)

architecture; 2 data accesses per clock cycle

• Differential clock inputs (CK and CK#)

• Commands entered on each positive CK edge

• DQS edge-aligned with data for READs; center-

aligned with data for WRITEs

• 4 internal banks for concurrent operation

• Data masks (DM) for masking write data—one mask

per byte

• Programmable burst lengths (BLs): 2, 4, 8, or 16

• Concurrent auto precharge option is supported

• Auto refresh and self refresh modes

• 1.8V LVCMOS-compatible inputs

• On-chip temperature sensor to control self refresh

rate

• Partial-array self refresh (PASR)

• Deep power-down (DPD)

• STATUS REGISTER READ (SRR) supported

• Selectable output drive strength (DS)

• Clock stop capability

• 64ms refresh

Notes: 1. BL 16: contact factory for availability.

2. Contact factory for remapped SRR output.

Options Marking

•V

DDQ

– 1.8V/1.8V H

• Configuration

– 128 Meg x 32 (16 Meg x 16 x 4 banks x 4)

– 64 Meg x 32 (8 Meg x 32 x 4 banks x 2)

– 32 Meg x 32 (8 Meg x 32 x 4 banks)

– 16 Meg x 32 (4 Meg x 32 x 4 banks)

128M32

64M32

32M32

16M32

•Device version

– Single die, standard addressing

– 2-die stack, standard addressing

– 4-die stack, standard addressing

•Plastic “green” package

– 152-ball VFBGA (14 x 14 x 1.0mm)

– 152-ball VFBGA (14 x 14 x 1.2mm)

• Timing – cycle time

– 5ns @ CL = 3

– 5.4ns @ CL = 3

– 6ns @ CL = 3

-5

-54

-6

• Operating temperature range

– Commercial (0°C to +70°C)

– Industrial (–40°C to +85°C)

None

Notes: 1. Quad die stack. Each CS configured with two x16 die connected in parallel to make up a 32-bit-

wide bus.

Table 1: Configuration Addressing

Architecture 128 Meg x 32

64 Meg x 32 32 Meg x 32 16 Meg x 32

Configuration

16 Meg x 16

x 4 banks x 4 die

8 Meg x 32

x 4 banks x 2 die

8 Meg x 32

x 4 banks

4 Meg x 32

x 4 banks

Refresh count

8K 8K 8K 8K

Row addressing

16K (A[13:0]) 8K (A[12:0]) 8K (A[12:0]) 8K (A[12:0])

Column addressing

1K (A[9:0]) 1K (A[9:0]) 1K (A[9:0]) 512 (A[8:0])

PDF: 09005aef833913f1/Source: 09005aef833913d6 Micron Technology, Inc., reserves the right to change products or specifications without notice.

ddr_mobile_sdram_only_152b_omap_pop.fm - Rev. E 06/09 EN

152-Ball x32 Mobile LPDDR (only) PoP (TI-OMAP)

Part Numbering Information – 152-Ball PoP

Micron

152-ball packaged LPDDR devices are available in several configurations.

Figure 1: Marketing Part Number Example

Micron Technology

Product Family

46 = LPDDR-SDRAM

Operating Voltage

H = 1.8V/1.8V

Configuration

128 Meg x 32

64 Meg x 32

32 Meg x 32

16 Meg x 32

Device Version

LF = Single die, standard addressing

L2 = 2-die stack, standard addressing

L4 = Quad die, standard addressing

Design Revision

:A = First generation

:B = Second generation

Operating Temperature

Blank = Commercial (0°C to +70°C)

IT = Industrial (–40°C to +85°C)

Cycle Time

-5 = 5ns

CK CL = 3

-54 = 5.4ns

CK CL = 3

-6 = 6ns

CK CL = 3

Package Code

CG = 152-ball (14 x 14 x 1.0mm) VFBGA

KZ = 152-ball (14 x 14 x 1.2mm) VFBGA

MT 46 H 32M32 LF CG -6 IT :A

PDF: 09005aef833913f1/Source: 09005aef833913d6 Micron Technology, Inc., reserves the right to change products or specifications without notice.

ddr_mobile_sdram_only_152b_omap_pop.fm - Rev. E 06/09 EN

152-Ball x32 Mobile LPDDR (only) PoP (TI-OMAP)

Device Marking

Due to the size of the package, the Micron-standard part number is not printed on the

top of the device. Instead, an abbreviated device mark consisting of a 5-digit alphanu-

meric code is used. The abbreviated device marks are cross-referenced to the Micron

part numbers at the FBGA Part Marking Decoder site: www.micron.com/decoder. To

view the location of the abbreviated mark on the device, refer to customer service note

CSN-11, “Product Mark/Label,” at www.micron.com/csn.

Table 2: 152-Ball Production Marketing Part Numbers

Part Numbers LPDDR Product Physical Part Marking

MT46H16M32LFCG-5:B

512Mb DDR, x32, 200 MHz D9KTK

MT46H16M32LFCG-5 IT:B

512Mb DDR, x32, 200 MHz D9KTL

MT46H16M32LFCG-54:B

512Mb DDR, x32, 185 MHz D9KTM

MT46H16M32LFCG-54 IT:B

512Mb DDR, x32, 185 MHz D9KTN

MT46H16M32LFCG-6:B

512Mb DDR, x32, 166 MHz D9KGX

MT46H16M32LFCG-6 IT:B

512Mb DDR, x32, 166 MHz D9KGZ

MT46H32M32LFCG-5:A

1Gb DDR, x32, 200 MHz D9KTP

MT46H32M32LFCG-5 IT:A

1Gb DDR, x32, 200 MHz D9KLD

MT46H32M32LFCG-54:A

1Gb DDR, x32, 185 MHz D9KTQ

MT46H32M32LFCG-54 IT:A

1Gb DDR, x32, 185 MHz D9KTR

MT46H32M32LFCG-6:A

1Gb DDR, x32, 166 MHz D9KHL

MT46H32M32LFCG-6 IT:A

1Gb DDR, x32, 166 MHz D9JZJ

MT46H64M32L2CG-5:A

2 x 1Gb DDR, x32, 200 MHz D9KTS

MT46H64M32L2CG-5 IT:A

2 x 1Gb DDR, x32, 200 MHz D9KLF

MT46H64M32L2CG-54:A

2 x 1Gb DDR, x32, 185 MHz D9KTV

MT46H64M32L2CG-54 IT:A

2 x 1Gb DDR, x32, 185 MHz D9KTW

MT46H64M32L2CG-6:A

2 x 1Gb DDR, x32, 166 MHz D9KJV

MT46H64M32L2CG-6 IT:A

2 x 1Gb DDR, x32, 166 MHz D9KFJ

MT46H128M32L4KZ-6 IT ES:A

4 × 1Gb DDR, x32, 166 MHz Z9KZL

P1-P3 P4-P6 P7-P9 P10-P12

MT46H32M32LFCG-5 IT:A TR

Mfr. #:

Buy MT46H32M32LFCG-5 IT:A TR

Manufacturer:

Micron

Description:

IC DRAM 1G PARALLEL 152VFBGA

Lifecycle:

New from this manufacturer.

Delivery:

DHL FedEx Ups TNT EMS

Payment:

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MT46H32M32LFCG-5 IT:A TR

MT46H32M32LFCG-5 IT:A TR

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