4
FN8130.2
June 15, 2006
Pin Description
PIN
(SOIC/PDIP) PIN TSSOP NAME FUNCTION
11CSChip Select Input.
CS HIGH, deselects the device and the SO output
pin is at a high impedance state. Unless a nonvolatile write cycle is underway, the device will be
in the standby power mode. CS
LOW enables the device, placing it in the active power mode. Prior
to the start of any operation after power-up, a HIGH to LOW transition on CS
is required.
22SOSerial Output. SO is a push/pull serial data output pin. A read cycle shifts data out on this pin. The
falling edge of the serial clock (SCK) clocks the data out.
58SISerial Input. SI is a serial data input pin. Input all opcodes, byte addresses, and memory data on this
pin. The rising edge of the serial clock (SCK) latches the input data. Send all opcodes (Table 1),
addresses and data MSB first.
69SCKSerial Clock. The serial clock controls the serial bus timing for data input and output. The rising edge
of SCK latches in the opcode, address, or data bits present on the SI pin. The falling edge of SCK
changes the data output on the SO pin.
36WPWrite Protect. The WP
pin works in conjunction with a nonvolatile WPEN bit to “lock” the setting
of the watchdog timer control and the memory write protect bits.
47V
SS
Ground
814V
CC
Supply Voltage
7 13 RESET
/
RESET
Reset Output. RESET/RESET is an active LOW/HIGH, open drain output which goes active
whenever V
CC
falls below the minimum V
CC
sense level. It will remain active until V
CC
rises above
the minimum V
CC
sense level for 200ms. RESET/RESET goes active if the watchdog timer is
enabled and CS
remains either HIGH or LOW longer than the selectable watchdog time out
period. A falling edge of CS
will reset the watchdog timer. RESET/RESET goes active on power-
up at about 1V and remains active for 200ms after the power supply stabilizes.
3-5,10-12 NC No internal connections
X5168, X5169
5
FN8130.2
June 15, 2006
Principles of Operation
Power-on Reset
Application of power to the X5168, X5169 activates a power-
on reset circuit. This circuit goes active at about 1V and pulls
the RESET
/RESET pin active. This signal prevents the
system microprocessor from starting to operate with
insufficient voltage or prior to stabilization of the oscillator.
When V
CC
exceeds the device V
TRIP
value for 200ms
(nominal) the circuit releases RESET
/RESET, allowing the
processor to begin executing code.
Low Voltage Monitoring
During operation, the X5168, X5169 monitors the V
CC
level
and asserts RESET
/RESET if supply voltage falls below a
preset minimum V
TRIP
. The RESET/RESET signal prevents
the microprocessor from operating in a power fail or
brownout condition. The RESET
/RESET signal remains
active until the voltage drops below 1V. It also remains active
until V
CC
returns and exceeds V
TRIP
for 200ms.
V
CC
Threshold Reset Procedure
The X5168, X5169 has a standard V
CC
threshold (V
TRIP
)
voltage. This value will not change over normal operating
and storage conditions. However, in applications where the
standard V
TRIP
is not exactly right, or for higher precision in
the V
TRIP
value, the X5168, X5169 threshold may be
adjusted.
Setting the V
TRIP
Voltage
This procedure sets the V
TRIP
to a higher voltage value. For
example, if the current V
TRIP
is 4.4V and the new V
TRIP
is
4.6V, this procedure directly makes the change. If the new
setting is lower than the current setting, then it is necessary
to reset the trip point before setting the new value.
To set the new V
TRIP
voltage, apply the desired V
TRIP
threshold to the V
CC
pin and tie the CS pin and the WP pin
HIGH. RESET
/RESET and SO pins are left unconnected.
Then apply the programming voltage V
P
to both SCK and SI
and pulse CS
LOW then HIGH. Remove V
P
and the
sequence is complete.
Resetting the V
TRIP
Voltage
This procedure sets the V
TRIP
to a “native” voltage level. For
example, if the current V
TRIP
is 4.4V and the V
TRIP
is reset,
the new V
TRIP
is something less than 1.7V. This procedure
must be used to set the voltage to a lower value.
To reset the V
TRIP
voltage, apply a voltage between 2.7 and
5.5V to the V
CC
pin. Tie the CS pin, the WP pin, and the SCK
pin HIGH. RESET
/RESET and SO pins are left unconnected.
Then apply the programming voltage V
P
to the SI pin ONLY
and pulse CS
LOW then HIGH. Remove V
P
and the
sequence is complete.
SCK
SI
V
P
V
P
CS
FIGURE 1. SET V
TRIP
VOLTAGE
SCK
SI
V
CC
V
P
CS
FIGURE 2. RESET V
TRIP
VOLTAGE
X5168, X5169
6
FN8130.2
June 15, 2006
V
TRIP
Programming
Apply 5V to V
CC
Decrement V
CC
RESET pin
goes active?
Measured V
TRIP
-
Desired V
TRIP
DONE
Execute
Sequence
Reset V
TRIP
Set V
CC
= V
CC
Applied =
Desired V
TRIP
Execute
Sequence
Set V
TRIP
New V
CC
Applied =
Old V
CC
Applied + Error
(V
CC
= V
CC
- 10mV)
Execute
Sequence
Reset V
TRIP
New V
CC
Applied =
Old V
CC
Applied - Error
Error Emax
Error = 0
YES
NO
Error > Emax
Emax = Maximum Desired Error
FIGURE 3. V
TRIP
PROGRAMMING SEQUENCE FLOW CHART
X5168/
1
2
3
4
8
7
6
5
V
TRIP
Adj.
Program
NC
NC
V
P
Reset V
TRIP
Test
V
TRIP
Set V
TRIP
NC
RESET
4.7K
4.7K
10K
10K
+
FIGURE 4. SAMPLE V
TRIP
RESET CIRCUIT
X5169
X5168, X5169

X5169S8Z-4.5A

Mfr. #:
Manufacturer:
Renesas / Intersil
Description:
Supervisory Circuits CPU SUP 16K SPI EE RST HI 5V+/-10% 4
Lifecycle:
New from this manufacturer.
Delivery:
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