M27W101 Device description
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For the most efficient use of these two control lines, E should be decoded and used as the
primary device selecting function, while G
should be made a common connection to all
devices in the array and connected to the READ
line from the system control bus. This
ensures that all deselected memory devices are in their low power standby mode and that
the output pins are only active when data is required from a particular memory device.
2.4 System considerations
The power switching characteristics of Advanced CMOS EPROMs require careful
decoupling of the devices. The supply current, I
CC
, has three segments that are of interest to
the system designer: the standby current level, the active current level, and transient current
peaks that are produced by the falling and rising edges of E
. The magnitude of the transient
current peaks is dependent on the capacitive and inductive loading of the device at the
output. The associated transient voltage peaks can be suppressed by complying with the
two line output control and by properly selected decoupling capacitors. It is recommended
that a 0.1µF ceramic capacitor be used on every device between V
CC
and V
SS
. This should
be a high frequency capacitor of low inherent inductance and should be placed as close to
the device as possible. In addition, a 4.7µF bulk electrolytic capacitor should be used
between V
CC
and V
SS
for every eight devices. The bulk capacitor should be located near the
power supply connection point. The purpose of the bulk capacitor is to overcome the voltage
drop caused by the inductive effects of PCB traces.
2.5 Programming
The M27W101 has been designed to be fully compatible with the M27C1001 and has the
same electronic signature. As a result the M27W101 can be programmed as the M27C1001
on the same programming equipment applying 12.75V on V
PP
and 6.25V on V
CC
using the
same PRESTO II algorithm. When delivered (and after each ‘1’s erasure for UV EPROM), all
bits of the M27W101 are in the '1' state. Data is introduced by selectively programming '0's
into the desired bit locations. Although only '0's will be programmed, both '1's and '0's can be
present in the data word. The only way to change a ‘0’ to a ‘1’ is by die exposure to
ultraviolet light (UV EPROM). The M27W101 is in the programming mode when V
PP
input is
at 12.75V, E
is at V
IL
and P is pulsed to V
IL
. The data to be programmed is applied to 8 bits
in parallel to the data output pins. The levels required for the address and data inputs are
TTL. V
CC
is specified to be 6.25V ± 0.25V.
2.6 Presto II programming algorithm
Presto II Programming Algorithm allows the whole array to be programmed, with a
guaranteed margin, in a typical time of 13 seconds. Programming with Presto II involves in
applying a sequence of 100µs program pulses to each byte until a correct verify occurs (see
Figure 5). During programming and verify operation, a Margin Mode circuit is automatically
activated in order to guarantee that each cell is programmed with enough margin. No
overprogram pulse is applied since the verify in Margin Mode at V
CC
much higher than 3.6V,
provides necessary margin to each programmed cell.
