Data Sheet ADV7127
Rev. A | Page 15 of 18
ANALOG OUTPUT
The analog output of the ADV7127 is a high impedance current
source. The current output is capable of directly driving a 37.5 Ω
load, such as a doubly terminated 75 Ω coaxial cable. Figure 24
shows the required configuration for the output connected into
a doubly terminated 75 Ω load. This arrangement develops
RS-343A video output voltage levels across a 75 Ω monitor.
I
OUT
Z
O
= 75
(CABLE)
Z
S
= 75
(SOURCE
TERMINATION)
Z
L
= 75
(MONITOR)
DAC
14959-025
Figure 24. Analog Output Termination for RS-343A
A suggested method of driving RS-170 video levels into a 75 Ω
monitor is shown in Figure 25. The output current level of the
DAC remains unchanged, but the source termination resistance,
Z
S
, on the DAC is increased from 75 Ω to 150 Ω.
I
OUT
Z
O
= 75
(CABLE)
Z
S
= 150
(SOURCE
TERMINATION)
Z
L
= 75
(MONITOR)
DAC
14959-026
Figure 25. Analog Output Termination for RS-170
More detailed information regarding load terminations for
various output configurations, including RS-343A and RS-170,
is available in the AN-205 Application Note, Video Formats and
Required Load Terminations.
Figure 23 shows the video waveforms associated with the
current output driving the doubly terminated 75 Ω load of
Figure 24.
GRAY SCALE OPERATION
The ADV7127 can be used for standalone, gray scale (mono-
chrome), or composite video applications (that is, only one
channel used for video information).
VIDEO OUTPUT BUFFER
The ADV7127 is specified to drive transmission line loads, which is
what most monitors are rated as. The analog output configurations
to drive such loads are shown in Figure 26. However, in some
applications, it may be required to drive long transmission line
cable lengths. Cable lengths greater than 10 meters can attenuate
and distort high frequency analog output pulses. The inclusion of
the output buffers compensates for some cable distortion. Buffers
with large full power bandwidths and gains between two and four
are required. These buffers need to be able to supply sufficient
current over the complete output voltage swing. Analog Devices,
Inc., produces a range of suitable op amps for such applications.
These include the AD843/AD844/AD847 series of monolithic op
amps. In very high frequency applications (80 MHz), the AD8061
is recommended. More information on line driver buffering
circuits is given in the relevant op amp data sheets.
Use of buffer amplifiers also allows implementation of other video
standards besides RS-343A and RS-170. Altering the gain
components of the buffer circuit results in any desired video level.
AD848
0.1µF
I
OUT
Z
1
Z
2
Z
O
= 75
(CABLE)
Z
S
= 75
(SOURCE
TERMINATION)
Z
L
= 75
(MONITOR)
DAC
75
–V
S
+V
S
0.1µF
GAIN (G) = 1 +
Z
1
Z
2
14959-027
Figure 26. AD848 As an Output Buffer
ADV7127 Data Sheet
Rev. A | Page 16 of 18
PCB LAYOUT CONSIDERATIONS
The ADV7127 is optimally designed for lowest noise perfor-
mance, both radiated and conducted noise. To complement the
excellent noise performance of the ADV7127, it is imperative
that great care be given to the PCB layout. Figure 27 shows a
recommended connection diagram for the ADV7127.
The PCB layout is optimized for lowest noise on the ADV7127
power and ground lines. Radiated and conducted noise can be
achieved by shielding the digital inputs and providing good
decoupling. The lead length between groups of V
AA
and GND
pins is minimized to inductive ringing.
GROUND PLANES
The ADV7127 and associated analog circuitry have a separate
ground plane referred to as the analog ground plane. This
ground plane connects to the regular PCB ground plane at a
single point through a ferrite bead, as illustrated in Figure 27.
The ferrite bead is located as close as possible (within 3 inches)
to the ADV7127.
The analog ground plane encompasses all ADV7127 ground
pins, voltage reference circuitry, power supply bypass circuitry,
the analog output traces, and any output amplifiers. The regular
PCB ground plane area encompasses all the digital signal traces,
excluding the ground pins, leading up to the ADV7127.
POWER PLANES
The PCB layout has two distinct power planes: one for analog
circuitry and one for digital circuitry. The analog power plane
encompasses the ADV7127 (V
AA
) and all associated analog
circuitry. This power plane is connected to the regular PCB
power plane (V
CC
) at a single point through a ferrite bead, as
illustrated in Figure 27. This bead is located within 3 inches of
the ADV7127.
The PCB power plane provides power to all digital logic on the
PCB, and the analog power plane provides power to all
ADV7127 power pins, voltage reference circuitry, and any
output amplifiers. The PCB power and ground planes do not
overlay portions of the analog power plane. Keeping the PCB
power and ground planes from overlaying the analog power
plane contributes to a reduction in plane to plane noise
coupling.
SUPPLY DECOUPLING
Noise on the analog power plane can be further reduced by the
use of multiple decoupling capacitors (see Figure 27).
Optimum performance is achieved by the use of 0.1 µF ceramic
capacitors. Each of the two groups of V
AA
is individually
decoupled to ground. The V
AA
pins (Pin 10 and Pin 17) must be
decoupled with capacitors to GND. Decouple the pins by
placing the capacitors as close as possible to the device with the
capacitor leads as short as possible between the V
AA
and GND
pins, thus minimizing lead inductance.
It is important to note that while the ADV7127 contains
circuitry to reject power supply noise, this rejection decreases
with frequency. If a high frequency switching power supply is
used, the designer must pay close attention to reducing power
supply noise. A dc power supply filter (Murata BNX002)
provides an electromagnetic interface (EMI) suppression
between the switching power supply and the main PCB.
Alternatively, consider using a 3-terminal voltage regulator.
DIGITAL SIGNAL INTERCONNECT
The digital signal lines to the ADV7127 must be isolated as
much as possible from the analog outputs and other analog
circuitry. Digital signal lines must not overlay the analog power
plane.
Due to the high clock rates used, long clock lines to the
ADV7127 must be avoided to minimize noise pickup.
Any active pull-up termination resistors for the digital inputs
are connected to the regular PCB power plane (V
CC
) and not the
analog power plane.
ANALOG SIGNAL INTERCONNECT
The ADV7127 is located as close as possible to the output
connectors, which minimizes noise pickup and reflections due
to impedance mismatch.
The video output signals overlay the ground plane and not the
analog power plane, thereby maximizing the high frequency
power supply rejection.
For optimum performance, the analog outputs each have a
source termination resistance to ground of 75 (doubly
terminated 75 configuration). This termination resistance
must be as close as possible to the ADV7127 to minimize
reflections.
Additional information on PCB design is available in the
AN-333 Application Note, Design and Layout of a Video
Graphics System for Reduced EMI.
Data Sheet ADV7127
Rev. A | Page 17 of 18
GND
R
SET
I
OUT
GROUND
ADV7127
C3
0.1µF
C5
0.1µF
R1
75
C1
33µF
C2
10µF
COMP
C6
0.1µF
ANALOG POWER PLANE
L2 (FERRITE BEAD)
D0
D9
CLOCK
VIDEO
DATA
INPUTS
ANALOG GROUND PLANE
C4
0.1µF
L1 (FERRITE BEAD)
V
AA
V
REF
+5V (V
CC
)
R
SET
560
COMPONENT DESCRIPTION VENDOR PART NUMBER
C1 33µF TANTALUM CAPACITOR
C2 10µF TANTALUM
C3, C4, C5, C6 0.1µF CERAMIC CAPACITOR
L1, L2 FERRITE BEAD FAIR-RITE 274300111 OR MURATA BL01/02/03
R1 75 1% METAL FILM RESISTOR
R
SET
560 1% METAL FILM RESISTOR
DALE CMF-55C
DALE CMF-55C
VIDEO
OUTPUT
PSAVE
PDOWN
14959-028
Figure 27. Typical Connection Diagram and Component List

ADV7127KRU50

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Digital to Analog Converters - DAC CMOS 240 MHz 10B High Speed DAC
Lifecycle:
New from this manufacturer.
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