CY28442-2
Document #: 38-07691 Rev. *B Page 16 of 21
AC Electrical Specifications
Parameter Description Condition Min. Max. Unit
Crystal
T
DC
XIN Duty Cycle The device will operate reliably with input
duty cycles up to 30/70 but the REF clock
duty cycle will not be within specification
47.5 52.5 %
T
PERIOD
XIN Period When XIN is driven from an external
clock source
69.841 71.0 ns
T
R
/ T
F
XIN Rise and Fall Times Measured between 0.3V
DD
and 0.7V
DD
–10.0ns
T
CCJ
XIN Cycle to Cycle Jitter As an average over 1-µs duration 500 ps
L
ACC
Long-term Accuracy Over 150 ms 300 ppm
CPU at 0.7V
T
DC
CPUT and CPUC Duty Cycle Measured at crossing point V
OX
45 55 %
T
PERIOD
100-MHz CPUT and CPUC Period Measured at crossing point V
OX
9.997001 10.00300 ns
T
PERIOD
133-MHz CPUT and CPUC Period Measured at crossing point V
OX
7.497751 7.502251 ns
T
PERIOD
166-MHz CPUT and CPUC Period Measured at crossing point V
OX
5.998201 6.001801 ns
T
PERIOD
200-MHz CPUT and CPUC Period Measured at crossing point V
OX
4.998500 5.001500 ns
T
PERIODSS
100-MHz CPUT and CPUC Period, SSC Measured at crossing point V
OX
9.997001 10.05327 ns
T
PERIODSS
133-MHz CPUT and CPUC Period, SSC Measured at crossing point V
OX
7.497751 7.539950 ns
T
PERIODSS
166-MHz CPUT and CPUC Period, SSC Measured at crossing point V
OX
5.998201 6.031960 ns
T
PERIODSS
200-MHz CPUT and CPUC Period, SSC Measured at crossing point V
OX
4.998500 5.026634 ns
T
PERIODAbs
100-MHz CPUT and CPUC Absolute
period
Measured at crossing point V
OX
9.912001 10.08800 ns
T
PERIODAbs
133-MHz CPUT and CPUC Absolute
period
Measured at crossing point V
OX
7.412751 7.587251 ns
T
PERIODAbs
166-MHz CPUT and CPUC Absolute
period
Measured at crossing point V
OX
5.913201 6.086801 ns
T
PERIODAbs
200-MHz CPUT and CPUC Absolute
period
Measured at crossing point V
OX
4.913500 5.086500 ns
T
PERIODSSAbs
100-MHz CPUT and CPUC Absolute
period, SSC
Measured at crossing point V
OX
9.912001 10.13827 ns
T
PERIODSSAbs
133-MHz CPUT and CPUC Absolute
period, SSC
Measured at crossing point V
OX
7.412751 7.624950 ns
T
PERIODSSAbs
166-MHz CPUT and CPUC Absolute
period, SSC
Measured at crossing point V
OX
5.913201 6.116960 ns
T
PERIODSSAbs
200-MHz CPUT and CPUC Absolute
period, SSC
Measured at crossing point V
OX
4.913500 5.111634 ns
T
CCJ
CPUT/C Cycle to Cycle Jitter Measured at crossing point V
OX
–85ps
T
CCJ2
CPU2_ITP Cycle to Cycle Jitter Measured at crossing point V
OX
125 ps
T
SKEW2
CPU2_ITP to CPU0 Clock Skew Measured at crossing point V
OX
150 ps
T
R
/ T
F
CPUT and CPUC Rise and Fall Time Measured from V
OL
= 0.175 to
V
OH
= 0.525V
175 700 ps
T
RFM
Rise/Fall Matching Determined as a fraction of
2*(T
R
– T
F
)/(T
R
+ T
F
)
–20%
T
R
Rise Time Variation 125 ps
T
F
Fall Time Variation 125 ps
V
HIGH
Voltage High Math averages Figure 15 660 850 mV
V
LOW
Voltage Low Math averages Figure 15 –150 mV
V
OX
Crossing Point Voltage at 0.7V Swing 250 550 mV
CY28442-2
Document #: 38-07691 Rev. *B Page 17 of 21
V
OVS
Maximum Overshoot Voltage V
HIGH
+
0.3
V
V
UDS
Minimum Undershoot Voltage –0.3 V
V
RB
Ring Back Voltage See Figure 15. Measure SE 0.2 V
SRC
T
DC
SRCT and SRCC Duty Cycle Measured at crossing point V
OX
45 55 %
T
PERIOD
100-MHz SRCT and SRCC Period Measured at crossing point V
OX
9.997001 10.00300 ns
T
PERIODSS
100-MHz SRCT and SRCC Period, SSC Measured at crossing point V
OX
9.997001 10.05327 ns
T
PERIODAbs
100-MHz SRCT and SRCC Absolute
Period
Measured at crossing point V
OX
9.872001 10.12800 ns
T
PERIODSSAbs
100-MHz SRCT and SRCC Absolute
Period, SSC
Measured at crossing point V
OX
9.872001 10.17827 ns
T
SKEW
Any SRCT/C to SRCT/C Clock Skew Measured at crossing point V
OX
100 ps
T
CCJ
SRCT/C Cycle to Cycle Jitter Measured at crossing point V
OX
125 ps
L
ACC
SRCT/C Long Term Accuracy Measured at crossing point V
OX
300 ppm
T
R
/ T
F
SRCT and SRCC Rise and Fall Time Measured from V
OL
= 0.175 to
V
OH
= 0.525V
175 700 ps
T
RFM
Rise/Fall Matching Determined as a fraction of
2*(T
R
– T
F
)/(T
R
+ T
F
)
–20%
T
R
Rise TimeVariation 125 ps
T
F
Fall Time Variation 125 ps
V
HIGH
Voltage High Math averages Figure 15 660 850 mV
V
LOW
Voltage Low Math averages Figure 15 –150 mV
V
OX
Crossing Point Voltage at 0.7V Swing 250 550 mV
V
OVS
Maximum Overshoot Voltage V
HIGH
+
0.3
V
V
UDS
Minimum Undershoot Voltage –0.3 V
V
RB
Ring Back Voltage See Figure 15. Measure SE 0.2 V
PCI/PCIF
T
DC
PCI Duty Cycle Measurement at 1.5V 45 55 %
T
PERIOD
Spread Disabled PCIF/PCI Period Measurement at 1.5V 29.99100 30.00900 ns
T
PERIODSS
Spread Enabled PCIF/PCI Period, SSC Measurement at 1.5V 29.9910 30.15980 ns
T
PERIODAbs
Spread Disabled PCIF/PCI Period Measurement at 1.5V 29.49100 30.50900 ns
T
PERIODSSAbs
Spread Enabled PCIF/PCI Period, SSC Measurement at 1.5V 29.49100 30.65980 ns
T
HIGH
PCIF and PCI high time Measurement at 2.4V 12.0 ns
T
LOW
PCIF and PCI low time Measurement at 0.4V 12.0 ns
T
R
/ T
F
PCIF/PCI rising and falling Edge Rate Measured between 0.8V and 2.0V 1.0 4.0 V/ns
T
SKEW
Any PCI clock to Any PCI clock Skew Measurement at 1.5V 500 ps
T
CCJ
PCIF and PCI Cycle to Cycle Jitter Measurement at 1.5V 500 ps
DOT
T
DC
DOT96T and DOT96C Duty Cycle Measured at crossing point V
OX
45 55 %
T
PERIOD
DOT96T and DOT96C Period Measured at crossing point V
OX
10.41354 10.41979 ns
T
PERIODAbs
DOT96T and DOT96C Absolute Period Measured at crossing point V
OX
10.16354 10.66979 ns
T
CCJ
DOT96T/C Cycle to Cycle Jitter Measured at crossing point V
OX
250 ps
L
ACC
DOT96T/C Long Term Accuracy Measured at crossing point V
OX
100 ppm
AC Electrical Specifications (continued)
Parameter Description Condition Min. Max. Unit
CY28442-2
Document #: 38-07691 Rev. *B Page 18 of 21
Test and Measurement Set-up
For PCI Single-ended Signals and Reference
The following diagram shows the single-ended PCI outputs.
T
R
/ T
F
DOT96T and DOT96C Rise and Fall
Time
Measured from V
OL
= 0.175 to
V
OH
= 0.525V
175 700 ps
T
RFM
Rise/Fall Matching Determined as a fraction of
2*(T
R
– T
F
)/(T
R
+ T
F
)
–20%
T
R
Rise Time Variation 125 ps
T
F
Fall Time Variation 125 ps
V
HIGH
Voltage High Math averages Figure 15 660 850 mV
V
LOW
Voltage Low Math averages Figure 15 –150 mV
V
OX
Crossing Point Voltage at 0.7V Swing 250 550 mV
V
OVS
Maximum Overshoot Voltage V
HIGH
+
0.3
V
V
UDS
Minimum Undershoot Voltage –0.3 V
V
RB
Ring Back Voltage See Figure 15. Measure SE 0.2 V
USB
T
DC
Duty Cycle Measurement at 1.5V 45 55 %
T
PERIOD
Period Measurement at 1.5V 20.83125 20.83542 ns
T
PERIODAbs
Absolute Period Measurement at 1.5V 20.48125 21.18542 ns
T
HIGH
USB high time Measurement at 2.4V 8.094 10.036 ns
T
LOW
USB low time Measurement at 0.4V 7.694 9.836 ns
T
R
/ T
F
Rising and Falling Edge Rate Measured between 0.8V and 2.0V 1.0 2.0 V/ns
T
CCJ
Cycle to Cycle Jitter Measurement at 1.5V 350 ps
REF
T
DC
REF Duty Cycle Measurement at 1.5V 45 55 %
T
PERIOD
REF Period Measurement at 1.5V 69.8203 69.8622 ns
T
PERIODAbs
REF Absolute Period Measurement at 1.5V 68.82033 70.86224 ns
T
R
/ T
F
REF Rising and Falling Edge Rate Measured between 0.8V and 2.0V 1.0 4.0 V/ns
T
CCJ
REF Cycle to Cycle Jitter Measurement at 1.5V 1000 ps
ENABLE/DISABLE and SET-UP
T
STABLE
Clock Stabilization from Power-up 1.8 ms
T
SS
Stopclock Set-up Time 10.0 ns
T
SH
Stopclock Hold Time 0 ns
AC Electrical Specifications (continued)
Parameter Description Condition Min. Max. Unit
0V
3.3V
2.4V
0.4V
1.5V
tDC
Tf
Tr
Output under Test
Probe
Load
Cap
30
pF
Figure 14. Single-ended PCI Lumped Load Configuration

CY28442ZXC-2T

Mfr. #:
Manufacturer:
Silicon Labs
Description:
IC CLOCK GEN ALVISO 56-TSSOP
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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