9
Date: 5/25/04 SP6651A High Efficiency 800mA Synchronous Buck Regulator © Copyright 2004 Sipex Corporation
is a minimum of K
ON
/L, more than the load
current demands. The converter goes in to a
standard pulse frequency modulation (PFM)
mode where the switching frequency is propor-
tional to the load current.
Low Dropout and Load Transient Operation
AND’ing the loop comparator also increases the
duty ratio past the ideal D= V
OUT
/V
IN
up to and
including 100%. Under a light to heavy load
transient, the loop comparator will hold the
main switch on longer than the minimum on
timer until the output is brought back into regu-
lation.
Also, as the input voltage supply drops down
close to the output voltage, the main MOSFET
resistance loss will dictate a much higher duty
ratio to regulate the output. Eventually as the
input voltage drops low enough, the output
voltage will follow, causing the loop compara-
tor to hold the converter at 100% duty cycle.
This mode is critical in extending battery life
when the output voltage is at or above the
minimum usable input voltage. The dropout
voltage is the minimum (V
IN
-V
OUT
) below
which the output regulation cannot be main-
tained. The dropout voltage of SP6651A is equal
to I
L
* (0.3Ω+ R
L1
) where 0.3Ω is the typical
R
DS(ON)
of the P-Channel MOSFET and R
L
is
the DC resistance of the inductor.
The SP6651A has been designed to operate in
dropout with a light load Iq of only 80µA. The
on-time control circuit seamlessly operates the
converter between CCM, DCM, and low drop-
out modes without the need for compensation.
The converter’s transient response is quick since
there is no compensated error amplifier in the loop.
Inductor Over-Current Protection
To reduce the light load dropout Iq, the SP6651A
over-current system is only enabled when I
L1
>
400mA. The inductor over-current protection
circuitry is programmed to limit the peak induc-
tor current to 1.25A. This is done during the on-
time by comparing the source to drain voltage
drop of the PMOS passing the inductor current
with a second voltage drop representing the
maximum allowable inductor current. As the
two voltages become equal, the over-current
comparator triggers a minimum off-time one
shot. The off-time one shot forces the loop into
the discharge phase for a minimum T
OFF
time
causing the inductor current to decrease. At the
end of the off-time, loop control is handed back
to the AND’d on-time signal. If the output
voltage is still low, charging begins until the
output is in regulation or the current limit has
been reached again. During startup and over-
load conditions, the converter behaves like a
current source at the programmed limit minus
half the current ripple. The minimum T
OFF
is
controlled by the equation:
T
OFF (MIN)
=
K
OFF
V
OUT
Under-Voltage Lockout
The SP6651A is equipped with a programmable
under-voltage lockout to protect the input bat-
tery source from excessive currents when sub-
stantially discharged. When the input supply is
below the UVLO threshold both power switches
are open to prevent inductor current from flow-
ing. The three levels of falling input voltage
UVLO threshold are shown in Table 1, with a
typical hysteresis of 120mV to prevent chatter-
ing due to the impedance of the input source.
During UVLO, BLON is forced low.
Under-Current Detection
The synchronous rectifier is comprised of an
inductor discharge switch, a voltage compara-
tor, and a driver latch. During the off-time,
positive inductor current flows into the PGND
pin 9 through the low side NMOS switch to LX
pin 10, through the inductor and the output
capacitor, and back to pin 9. The comparator
monitors the voltage drop across the discharge
NMOS. As the inductor current approaches zero,
the channel voltage sign goes from negative to
positive, causing the comparator to trigger the
THEORY OF OPERATION: Continued
