74AHC_AHCT2G00 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 3 — 27 March 2013 6 of 15
NXP Semiconductors
74AHC2G00; 74AHCT2G00
Dual 2-input NAND gate
11. Dynamic characteristics
[1] t
pd
is the same as t
PLH
and t
PHL
.
[2] Typical values are measured at V
CC
= 3.3 V.
[3] Typical values are measured at V
CC
= 5.0 V.
[4] C
PD
is used to determine the dynamic power dissipation (P
D
in W).
P
D
=C
PD
V
CC
2
f
i
N+(C
L
V
CC
2
f
o
) where:
f
i
= input frequency in MHz;
f
o
= output frequency in MHz;
C
L
= output load capacitance in pF;
V
CC
= supply voltage in V;
N = number of inputs switching;
(C
L
V
CC
2
f
o
) = sum of the outputs.
Table 8. Dynamic characteristics
GND = 0 V; for test circuit see Figure 7.
Symbol Parameter Conditions 25 C 40 C to +85 C 40 C to +125 C Unit
Min Typ Max Min Max Min Max
74AHC2G00
t
pd
propagation
delay
nA, nB to nY; see Figure 6
[1]
V
CC
= 3.0 V to 3.6 V
[2]
C
L
= 15 pF - 4.5 7.9 1.0 9.5 1.0 10.5 ns
C
L
= 50 pF - 6.5 11.4 1.0 13.0 1.0 14.5 ns
V
CC
= 4.5 V to 5.5 V
[3]
C
L
= 15 pF - 3.5 5.5 1.0 6.5 1.0 7.0 ns
C
L
= 50 pF - 4.9 7.5 1.0 8.5 1.0 9.5 ns
C
PD
power
dissipation
capacitance
per buffer;
C
L
=50pF;f
i
=1 MHz;
V
I
=GNDtoV
CC
[4]
-17- - - - - pF
74AHCT2G00
t
pd
propagation
delay
nA, nB to nY; see Figure 6
[1]
V
CC
= 4.5 V to 5.5 V
[3]
C
L
= 15 pF 1.0 3.6 6.2 1.0 7.1 1.0 8.0 ns
C
L
= 50 pF 1.0 5.0 7.9 1.0 9.0 1.0 10.0 ns
C
PD
power
dissipation
capacitance
per buffer;
C
L
=50pF;f
i
=1 MHz;
V
I
=GNDtoV
CC
[4]
-18- - - - - pF
