© Semiconductor Components Industries, LLC, 2011
June, 2011 Rev. 2
1 Publication Order Number:
MC74HCT4051A/D
MC74HCT4051A,
MC74HCT4052A,
MC74HCT4053A
Analog Multiplexers /
Demultiplexers with LSTTL
Compatible Inputs
HighPerformance SiliconGate CMOS
The MC74HCT4051A, MC74HCT4052A and MC74HCT4053A
utilize silicongate CMOS technology to achieve fast propagation
delays, low ON resistances, and low OFF leakage currents. These
analog multiplexers/demultiplexers control analog voltages that may
vary across the complete power supply range (from V
CC
to V
EE
).
The HCT4051A, HCT4052A and HCT4053A are identical in
pinout to the metalgate MC14051AB, MC14052AB and
MC14053AB. The ChannelSelect inputs determine which one of the
Analog Inputs/Outputs is to be connected, by means of an analog
switch, to the Common Output/Input. When the Enable pin is HIGH,
all analog switches are turned off.
The ChannelSelect and Enable inputs are compatible with standard
CMOS and LSTTL outputs.
These devices have been designed so that the ON resistance (R
on
) is
more linear over input voltage than R
on
of metalgate CMOS analog
switches.
For a multiplexer/demultiplexer with injection current protection,
see HC4851A and HCT4851A.
Features
Fast Switching and Propagation Speeds
Low Crosstalk Between Switches
Diode Protection on All Inputs/Outputs
Analog Power Supply Range (V
CC
V
EE
) = 2.0 to 12.0 V
Digital (Control) Power Supply Range (V
CC
GND) = 2.0 to 6.0 V
Improved Linearity and Lower ON Resistance Than MetalGate
Counterparts
Low Noise
In Compliance with the Requirements of JEDEC Standard No. 7 A
Chip Complexity: HCT4051A 184 FETs or 46 Equivalent Gates
HCT4052A 168 FETs or 42 Equivalent Gates
HCT4053A 156 FETs or 39 Equivalent Gates
These Devices are PbFree and are RoHS Compliant
http://onsemi.com
MARKING
DIAGRAMS
SOIC16
D SUFFIX
CASE 751B
TSSOP16
DT SUFFIX
CASE 948F
1
16
1
16
1
16
HCT405xAG
AWLYWW
HCT40
5xA
ALYWG
G
1
16
SOIC16 WIDE
DW SUFFIX
CASE 751G
1
16
HCT405xA
AWLYWWG
See detailed ordering and shipping information in the package
dimensions section on page 13 of this data sheet.
ORDERING INFORMATION
1
16
x = 1, 2, 3
A = Assembly Location
WL, L = Wafer Lot
YY, Y = Year
WW, W = Work Week
G or G = PbFree Package
(Note: Microdot may be in either location)
MC74HCT4051A, MC74HCT4052A, MC74HCT4053A
http://onsemi.com
2
Figure 1. Logic Diagram MC74HCT4051A
SinglePole, 8Position Plus Common Off
X0
13
X1
14
X2
15
X3
12
X4
1
X5
5
X6
2
X7
4
A
11
B
10
C
9
ENABLE
6
MULTIPLEXER/
DEMULTIPLEXER
X
3
ANALOG
INPUTS/
CHANNEL
INPUTS
PIN 16 = V
CC
PIN 7 = V
EE
PIN 8 = GND
COMMON
OUTPUT/
INPUT
1516 14 13 12 11 10
21 34567
V
CC
9
8
X2 X1 X0 X3 A B C
X4 X6 X X7 X5 Enable V
EE
GND
Figure 2. Pinout: MC74HCT4051A
(Top View)
OUTPUTS
SELECT
L
L
L
L
H
H
H
H
X
L
L
H
H
L
L
H
H
X
L
H
L
H
L
H
L
H
X
FUNCTION TABLE MC74HCT4051A
Control Inputs
ON Channels
Enable
Select
CBA
X0
X1
X2
X3
X4
X5
X6
X7
NONE
L
L
L
L
L
L
L
L
H
X = Don’t Care
Figure 3. Logic Diagram MC74HCT4052A
DoublePole, 4Position Plus Common Off
X0
12
X1
14
X2
15
X3
11
Y0
1
Y1
5
Y2
2
Y3
4
A
10
B
9
ENABLE
6
X SWITCH
Y SWITCH
X
13
ANALOG
INPUTS/OUTPUTS
CHANNEL‐SELECT
INPUTS
PIN 16 = V
CC
PIN 7 = V
EE
PIN 8 = GND
COMMON
OUTPUTS/INPUTS
L
L
H
H
X
L
H
L
H
X
FUNCTION TABLE MC74HCT4052A
Control Inputs
ON ChannelsEnable
Select
BA
X0
X1
X2
X3
L
L
L
L
H
X = Don’t Care
Figure 4. Pinout: MC74HCT4052A (Top View)
1516 14 13 12 11 10
21 34567
V
CC
9
8
X2 X1 X X0 X3 A B
Y0 Y2 Y Y3 Y1 Enable V
EE
GND
Y
3
Y0
Y1
Y2
Y3
NONE
MC74HCT4051A, MC74HCT4052A, MC74HCT4053A
http://onsemi.com
3
Figure 5. Logic Diagram MC74HCT4053A
Triple SinglePole, DoublePosition Plus Common Off
X0
12
X1
13
A
11
B
10
C
9
ENABLE
6
X SWITCH
Y SWITCH
X
14
ANALOG
INPUTS/OUTPUTS
CHANNEL‐SELECT
INPUTS
PIN 16 = V
CC
PIN 7 = V
EE
PIN 8 = GND
COMMON
OUTPUTS/INPUTS
L
L
L
L
H
H
H
H
X
L
L
H
H
L
L
H
H
X
L
H
L
H
L
H
L
H
X
FUNCTION TABLE MC74HCT4053A
Control Inputs
ON Channels
Enable
Select
CBA
L
L
L
L
L
L
L
L
H
X = Don’t Care
Figure 6. Pinout: MC74HCT4053A (Top View)
1516 14 13 12 11 10
21 34567
V
CC
9
8
Y X X1 X0 A B C
Y1 Y0 Z1 Z Z0 Enable V
EE
GND
Z0
Z0
Z0
Z0
Z1
Z1
Z1
Z1
Y0
Y0
Y1
Y1
Y0
Y0
Y1
Y1
X0
X1
X0
X1
X0
X1
X0
X1
NONE
Y0
2
Y1
1
Y
15
Z0
5
Z1
3
Z
4
Z SWITCH
NOTE: This device allows independent control of each switch.
ChannelSelect Input A controls the XSwitch, Input B controls
the YSwitch and Input C controls the ZSwitch
MAXIMUM RATINGS
Symbol Parameter Value Unit
V
CC
Positive DC Supply Voltage (Referenced to GND)
(Referenced to V
EE
)
0.5 to +7.0
0.5 to +14.0
V
V
EE
Negative DC Supply Voltage (Referenced to GND) 7.0 to +5.0 V
V
IS
Analog Input Voltage V
EE
0.5 to
V
CC
+ 0.5
V
V
in
Digital Input Voltage (Referenced to GND) 0.5 to V
CC
+ 0.5 V
I DC Current, Into or Out of Any Pin ±25 mA
P
D
Power Dissipation in Still Air, SOIC Package†
TSSOP Package†
500
450
mW
T
stg
Storage Temperature Range 65 to +150 °C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress
ratings only. Functional operation above the Recommended Operating Conditions is not implied.
Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
Derating SOIC Package: 7 mW/°C from 65°C to 125°C
TSSOP Package: 6.1 mW/°C from 65°C to 125°C
This device contains protection
circuitry to guard against damage
due to high static voltages or electric
fields. However, precautions must
be taken to avoid applications of any
voltage higher than maximum rated
voltages to this highimpedance cir-
cuit. For proper operation, V
in
and
V
out
should be constrained to the
range GND v (V
in
or V
out
) v V
CC
.
Unused inputs must always be
tied to an appropriate logic voltage
level (e.g., either GND or V
CC
).
Unused outputs must be left open.

M74HCT4053ADTR2G

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
Encoders, Decoders, Multiplexers & Demultiplexers IC MUX/DEMUX TRIPLE 2X1
Lifecycle:
New from this manufacturer.
Delivery:
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