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TISP4A270H3BJR-S

P1-P3P4-P6P7-P9
*RoHS Directive 2002/95/EC Jan 27 2003 including Annex
APRIL 2002 - REVISED JANUARY 2007
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
TISP4A270H3BJ LCAS R
LINE
Protector
TISP4A270H3BJ
ASYMMETRICAL-BIDIRECTIONAL THYRISTOR SPD
SMB Package (Top View)
Device Symbol and Circuit Application
Description
The TISP4A270H3BJ is an asymmetrical-bidirectional thyristor surge protective device (SPD). It is designed to limit the peak voltages on
the R
LINE
(Ring Line) terminal of ‘7581/2/3 LCAS (Line Card Access Switch) devices. The TISP4A270H3BJ must have the bar-indexed
terminal 1 (G) connected to the protective ground and terminal 2 (R) connected to the R
LINE
terminal.
The TISP4A270H3BJ voltages are chosen to give R
LINE
terminal protection for all LCAS switch conditions. The most potentially stressful
condition is low level power cross when the switches are closed. Under this condition, the TISP4A270H3BJ limits the voltage and
corresponding LCAS dissipation until the LCAS thermal trip operates and opens the switches.
Under open-circuit ringing conditions, the R
LINE
terminal will have high peak voltages. For battery backed ringing, the R
LINE
terminal will
have a larger peak negative voltage than positive, i.e. the peak voltages are asymmetric. The TISP4A270H3BJ has a similar voltage
asymmetry which will allow the maximum possible ringing voltage, while still giving protection. With a connected telephone line, the
LCAS T
LINE
(Tip Line) terminal voltage levels will be less than 50 % of the open-circuit R
LINE
terminal values. So the T
LINE
terminal can be
protected by a symmetrical-bidirectional overvoltage protector of the TISP4xxxH3BJ series.
How To Order
Optimized LCAS R
LINE
Protector
TISP4A270H3BJ V
(BO)
Derived from:
-Break Switch, SW1 & SW2, Ratings
-Ring Return Switch, SW3, Rating
-Ringing Access Switch, SW4, Rating
-Switch Isolation Ratings
-Battery Voltage Range of -40 V to -60 V
-Power Fault Conditions
-Lightning Impulse Conditions
-LCAS Characteristic Temperature Range
TISP4A270H3BJ Designed for:
-Battery-Backed Ringing Circuits
Voltage Swing . . . . . .+148 V to -206 V
Allows . . . . . . . . . . .103 V rms Ringing with -60 V Battery
Temperature Range . .-40 °C to +85 °C
Rated for International Surge Wave Shapes
12
R
G
MD4A270B
RING
TIP
SW4
Ringing
access
switch
TISP4A270H3
AI4BITAMA
'7581 LCAS
T
LINE
T
BAT
R
BAT
F
GND
V
BAT
SW1
Break
switch
SW2
Break
switch
SCR,
Diode
pr
otection
SW3
Ring
return
switch
R
RINGING
T
RINGING
R
LINE
Control
logic
TISP4165H3
R
G
D
GN
D
V
DD
T
SD
LATCH
INPUT
Device
V
DRM
V
V
(BO)
V
‘4A270
+160 +217
-222 -270
Wave Shape Standard
I
PPSM
A
2/10 GR-1089-CORE 500
10/700 IT
U-T K.20/45/21 150
10/1000 GR-1089-CORE 100
Device Package Carrier
TISP4A270H3BJ BJ (SMB/DO-214AA with J-Bend) R (Embossed Tape Reeled) TISP4A270H3BJR-S
Order As
.......................................UL Recognized Component
*RoHS COMPLIANT
APRIL 2002 - REVISED JANUARY 2007
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
TISP4A270H3BJ LCAS R
LINE
Protector
Description (Continued)
These devices allow signal voltages up to the maximum off-state voltage value, V
DRM
, see Figure 1. Voltages above V
DRM
are clipped and
will not exceed the breakover voltage, V
(BO)
, level. If sufficient current flows due to the overvoltage, the device switches into a low-voltage
on-state condition, which diverts the current from the overvoltage though the device. When the diverted current falls below the holding
current, I
H
, level the devices switches off and restores normal system operation.
The TISP4A270H3BJ is guaranteed to voltage limit and withstand the listed international lightning surges in both polarities. This high
current protection device is in a plastic SMB package (JEDEC DO-214AA) and supplied in embossed tape reel pack.
Absolute Maximum Ratings, T
A
= 25 °C (Unless Otherwise Noted)
Rating Symbol Value Unit
Repetitive peak off-state voltage, (see Note 1)
T
A
= 25 °C
T
A
= -40 °C
V
DRM
+160/-222
148/-206
V
Non-repetitive peak on-state pulse current (see Notes 2 and 3)
I
PPSM
A
2/10 (GR-1089-CORE, 2/10 voltage wave shape) 500
5/310 (ITU-T K.44, 10/700 µs voltage wave shape used in K.20/45/21) 150
10/1000 (GR-1089-CORE, 10/1000 voltage wave shape) 100
Non-repetitive peak on-state current (see Notes 2, 3 and 4)
I
TSM
55
60
2.2
A
20 ms (50 Hz) full sine wave
16.7 ms (60 Hz) full sine wave
1000 s 50 Hz/60 Hz a.c.
Initial rate of rise of on-state current, Exponential current ramp, Maximum ramp value < 200 A di
T
/dt 400 A/µs
Junction temperature T
J
-40 to +150 °C
Storage temperature range T
stg
-65 to +150 °C
NOTES: 1. See Figure 7 for voltage values at intermediate temperatures.
2. Initially, the TISP4A270H3BJ must be in thermal equilibrium with T
J
= 25 °C.
3. The surge may be repeated after the TISP4A270H3BJ returns to its initial conditions.
4. EIA/JESD51-2 environment and EIA/JESD51-3 PCB with standard footprint dimensions connected with 5 A rated printed wiring
track widths. See Figure 6 for the current ratings at other durations. Derate current values at -0.61 %/°C for ambient
temperatures above 25 °C.
Overload Ratings, T
A
= 25 °C (Unless Otherwise Noted)
Rating Symbol Value Unit
Maximum overload on-state current without open circuit, 50 Hz/60 Hz a.c. (see Note 5)a
0.03 s
0.07 s
1.6 s
5.0 s
1000 s
I
T(OV)M
60
40
8
7
2.2
A rms
NOTE 5: Peak overload on-state current during a.c. power cross tests of GR-1089-CORE and UL 1950/60950. These electrical stress
levels may damage the TISP4A270H3BJ silicon chip. After test, the pass criterion is either that the device is functional or, if it is
faulty, that it has a short circuit fault mode. In the short circuit fault mode, the following equipment is protected as the device is a
permanent short across the line. The equipment would be unprotected if an open circuit fault mode developed.
APRIL 2002 - REVISED JANUARY 2007
Specifications are subject to change without notice.
Customers should verify actual device performance in their specific applications.
TISP4A270H3BJ LCAS R
LINE
Protector
Electrical Characteristics, T
A
= 25 °C (Unless Otherwise Noted)
Parameter Test Conditions Min Typ Max Unit
I
DRM
Repetitive peak off-
state current
V
D
= +100 V and -200 V
T
A
= 25 °C
T
A
= 85 °C
±5
±10
µA
V
(BO)
Breakover voltage dv/dt = ±250 V/ms, R
SOURCE
= 300 Ω
+217
-270
V
I
(BO)
Breakover current dv/dt = ±250 V/ms, R
SOURCE
= 300 Ω ±0.15 ±0.6 A
I
H
Holding current I
T
= ±5 A, di/dt = +/-30 mA/ms ±0.15 ±0.6 A
dv/dt
Critical rate of rise of
off-state voltage
Linear voltage ramp, Maximum ramp value < 0.85V
DRM
±5 kV/µs
I
D
Off-state current V
D
= ±50 V T
A
= 85 °C ±10 µA
C
off
Off-state capacitance f = 1 MHz, V
d
= 1 V rms
V
D
= 100 V
V
D
=50V
V
D
=10V
V
D
=5V
V
D
=2V
V
D
=1V
V
D
=0
V
D
=-1V
V
D
=-2V
V
D
=-5V
V
D
=-10V
V
D
=-50V
V
D
=-100V
21
27
41
48
56
61
68
62
56
48
40
25
20
23
29
46
53
62
67
74
68
62
52
45
28
22
pF
.
V
(BO)
Ramp breakover
voltage
dv/dt ≤ ±1 kV/µs, Linear voltage ramp, Maximum ramp value = ±500 V
dv/dt = ±20 A/µs, Linear current ramp, Maximum ramp value = ±10 A
+231
-288
V
Thermal Characteristics
Parameter Test Conditions Min Typ Max Unit
R
ΘJA
Junction to free air thermal resistance
EIA/JESD51-3 PCB, I
T
= I
TSM(1000)
,
T
A
= 25 °C, (see Note 6)
113
°C/W
265 mm x 210 mm populated line card,
4-layer PCB, I
T
= I
TSM(1000)
, T
A
= 25 °C
50
NOTE 6: EIA/JESD51-2 environment and PCB has standard footprint dimensions connected with 5 A rated printed wiring track widths.
P1-P3P4-P6P7-P9

TISP4A270H3BJR-S

Mfr. #:
Buy TISP4A270H3BJR-S
Manufacturer:
Bourns
Description:
Thyristor Surge Protection Devices (TSPD) PROTECTOR - SINGLE BIDIRECTIONAL
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
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