LTC4290/LTC4271
7
429071fb
For more information www.linear.com/LTC4290
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
I
2
C Timing
f
SCLK
Clock Frequency (Note 7)
l
1 MHz
t
1
Bus Free Time Figure 5 (Notes 7, 9)
l
480 ns
t
2
Start Hold Time Figure 5 (Notes 7, 9)
l
240 ns
t
3
SCL Low Time Figure 5 (Notes 7, 9)
l
480 ns
t
4
SCL High Time Figure 5 (Notes 7, 9)
l
240 ns
t
5
SDAIN Data Hold Time Figure 5 (Notes 7, 9)
l
60 ns
t
5
Data Clock to SDAOUT Valid Figure 5 (Notes 7, 9)
l
130 ns
t
6
Data Set-Up Time Figure 5 (Notes 7, 9)
l
80 ns
t
7
Start Set-Up Time Figure 5 (Notes 7, 9)
l
240 ns
t
8
Stop Set-Up Time Figure 5 (Notes 7, 9)
l
240 ns
t
r
SCL, SDAIN Rise Time Figure 5 (Notes 7, 9)
l
120 ns
t
f
SCL, SDAIN Fall Time Figure 5 (Notes 7, 9)
l
60 ns
Fault Present to INT Pin Low (Notes 7, 9, 10)
l
150 ns
Stop Condition to INT Pin Low (Notes 7, 9, 10)
l
1.5 µs
ARA to INT Pin High Time (Notes 7, 9)
l
1.5 µs
SCL Fall to ACK Low (Notes 7, 9)
l
130 ns
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. AGND – V
EE
= 54V and V
DD
– DGND = 3.3V unless otherwise noted.
(Notes 3 & 4)
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. With the exception of (V
DD
–
DGND), exposure to any Absolute Maximum Rating condition for extended
periods may affect device reliability and lifetime.
Note 2: This IC includes overtemperature protection that is intended
to protect the device during momentary overload conditions. Junction
temperature will exceed 140ºC when overtemperature protection is active.
Continuous operation above the specified maximum operating junction
temperature may impair device reliability.
Note 3: All currents into device pins are positive; all currents out of device
pins are negative.
Note 4: The LTC4290 operates with a negative supply voltage (with
respect to AGND). To avoid confusion, voltages in this data sheet are
referred to in terms of absolute magnitude.
Note 5: t
DIS
is the same as t
MPDO
defined by IEEE 802.3
Note 6: The LTC4271 digital interface operates with respect to DGND. All
logic levels are measured with respect to DGND.
Note 7: Guaranteed by design, not subject to test.
Note 8: The IEEE 802.3 specification allows a PD to present its
Maintain Power Signature (MPS) on an intermittent basis without being
disconnected. In order to stay powered, the PD must present the MPS for
t
MPS
within any t
MPDO
time window.
Note 9: Values Measured at V
ILD
and V
IHD
Note 10: If a fault condition occurs during an I
2
C transaction, the INT pin
will not be pulled down until a stop condition is present on the I
2
C bus.
Note 11: Load characteristics of the LTC4290 during Mark: 7V < (AGND –
V
OUTn
) < 10V or I
OUT
< 50µA.
Note 12: See the LTC4271 Software Programming documentation for
information on serial bus usage and device configuration and status
registers.
Note 13: Do not source or sink current from CAP1 and CAP2.
