C8051F35x-DK
4 Rev. 0.4
4. Target Board
The C8051F35x Development Kit includes a target board with a C8051F350 device pre-installed for evaluation and
preliminary software development. Numerous input/output (I/O) connections are provided to facilitate prototyping
using the target board. Refer to Figure 3 for the locations of the various I/O connectors.
P1 Power connector (accepts input from 7 to 15 VDC unregulated power adapter)
J1 22-pin Expansion I/O connector
J3 Port I/O Configuration Jumper Block
J4 DEBUG connector for Debug Adapter interface
J5 DB-9 connector for UART0 RS232 interface
J6 Analog I/O terminal block
J7 Connector for IDAC0 voltage circuit
J8 USB Debug Adapter target board power connector
J9, J10 External crystal enable connectors
J11 Connector for IDAC1 voltage circuit
J12 Connector block for Thermistor circuitry
J13, J14 ADC external voltage reference connectors
Figure 3. C8051F350 Target Board
DEBUG
Pin 1
P1
J5
Prototype Area
Pin 1
J6
C8051
F35X
Prototyping Area & I/O Connection Points
J8
J4
Pin 2
Pin 1
J1
PWR
P1.0 Reset
P0.6
P0.7
J2
J9 J10
J11 J7
Pin 1
Pin 2
J12
Pin 1
Pin 2
J3
J14
J13
Pin 1
C8051F35x-DK
Rev. 0.4 5
4.1. System Clock Sources
The C8051F350 device installed on the target board features a calibrated programmable internal oscillator which is
enabled as the system clock source on reset. After reset, the internal oscillator operates at a frequency of
3.0625 MHz (±2%) by default but may be configured by software to operate at other frequencies. Therefore, in
many applications an external oscillator is not required. However, if you wish to operate the C8051F350 device at a
frequency not available with the internal oscillator, an external crystal may be used. Refer to the C8051F35x data
sheet for more information on configuring the system clock source.
The target board is designed to facilitate the installation of an external crystal. Remove shorting blocks at headers
J9 and J10 and install the crystal at the pads marked Y1. Install a 10 M resistor at R9 and install capacitors at
C14 and C15 using values appropriate for the crystal you select. Refer to the C8051F35x data sheet for more
information on the use of external oscillators.
4.2. Switches and LEDs
Two switches are provided on the target board. Switch SW1 is connected to the RESET pin of the C8051F350.
Pressing SW1 puts the device into its hardware-reset state. Switch SW2 is connected to the C8051F350’s general
purpose I/O (GPIO) pin through headers. Pressing SW2 generates a logic low signal on the port pin. Remove the
shorting block from the jumper to disconnect SW2 from the port pins. The port pin signal is also routed to a pin on
the J1 I/O connector. See Table 1 for the port pins and headers corresponding to each switch.
Three LEDs are also provided on the target board. The red LED labeled PWR is used to indicate a power
connection to the target board. The green LEDs labeled with port pin names are connected to the C8051F350’s
GPIO pins through headers. Remove the shorting blocks from the headers to disconnect the LEDs from the port
pins. The port pin signals are also routed to pins on the J1 I/O connector. See Table 1 for the port pins and headers
corresponding to each LED.
Table 1. Target Board I/O Descriptions
Description I/O Jumper
SW1 Reset none
SW2 P1.0 J3[5–6]
Green LED D2 P0.6 J3[1–2]
Green LED D1 P0.7 J3[3–4]
Red LED PWR none
C8051F35x-DK
6 Rev. 0.4
4.3. Expansion I/O Connector (J1)
The 34-pin Expansion I/O connector J1 provides access to all signal pins of the C8051F350 device. Pins for V
DD
and GND as well as pins for VDDA and AGND are also available. A small through-hole prototyping area is also
provided. All I/O signals routed to connector J1 are also routed to through-hole connection points between J1 and
the prototyping area (see Figure 3 on page 4). Each connection point is labeled indicating the signal available at
the connection point. See Table 2 for a list of pin descriptions for J1.
4.4. Target Board DEBUG Interface (J4)
The
DEBUG
connector (J4) provides access to the
DEBUG
(C2) pins of the C8051F350. It is used to connect the
Serial Adapter or the USB Debug Adapter to the target board for in-circuit debugging and Flash programming.
Table 3 shows the
DEBUG
pin definitions.
4.5. Serial Interface (J5)
A RS232 transceiver circuit and DB-9 (J5) connector are provided on the target board to facilitate serial
connections to UART0 of the C8051F350. The TX, RX, RTS and CTS signals of UART0 may be connected to the
DB-9 connector and transceiver by installing shorting blocks on header J3.
J3[7–8] - Install shorting block to connect UART0 TX (P0.4) to transceiver.
J3[9–10] - Install shorting block to connect UART0 RX (P0.5) to transceiver.
J3[11–12] - Install shorting block to connect UART0 RTS (P1.4) to transceiver.
J3[13–14]- Install shorting block to connect UART0 CTS (P1.5) to transceiver.
Table 2. J1 Pin Descriptions
Pin # Description Pin # Description Pin # Description
1
V
DD
13 P1.2 25 AIN3
2 GND 14 P1.3 26 AIN4
3 P0.0 15 P1.4 27 AIN5
4 P0.1 16 P1.5 28 AIN6
5 P0.2 17 P1.6/IDAC0 29 AIN7
6 P0.3 18 P1.7/IDAC1 30 VREF+
7 P0.4 19 P2.0 31 /RST
8P0.5 20AGND 32VREF
9P0.6 21
AGND
33
VDDA
10 P0.7 22 AIN0 34 AGND
11 P1.0 23 AIN1 - -
P1.1 24 AIN2 - -
Table 3. DEBUG Connector Pin Descriptions
Pin # Description
1 +3VD (+3.3VDC)
2, 3, 9 GND (Ground)
4C2D
5/RST (Reset)
6P3.0
7C2CK
8 Not Connected
10 USB Power

C8051F350DK

Mfr. #:
Manufacturer:
Silicon Labs
Description:
Development Boards & Kits - 8051 Development Kit for C8051F350 and F351,F352, F353 MCUs
Lifecycle:
New from this manufacturer.
Delivery:
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