4
FN6088.5
July 31, 2007
POWER SUPPLY CHARACTERISTICS
Power Supply Range Full 1.65 - 3.6 V
Positive Supply Current, I+ V+ = +3.6V, V
IN
= 0V or V+ 25 - - 40 nA
Full - - 750 nA
DIGITAL INPUT CHARACTERISTICS
Input Voltage Low, V
INL
Full - - 0.4 V
Input Voltage High, V
INH
Full 1.4 - - V
Input Current, I
INH
, I
INL
V+ = 3.3V, V
IN
= 0V or V+ Full -0.5 - 0.5 μA
Electrical Specifications - 1.8V Supply Test Conditions: V+ = +1.65V to +2V, GND = 0V, V
INH
= 1.0V, V
INL
= 0.4V (Note 4),
Unless Otherwise Specified
PARAMETER TEST CONDITIONS
TEMP
(°C)
MIN
(Notes 5, 6) TYP
MAX
(Notes 5, 6) UNITS
ANALOG SWITCH CHARACTERISTICS
Analog Signal Range, V
ANALOG
Full 0 - V+ V
ON-Resistance, r
ON
V+ = 1.65V, I
COM
= 100mA, V
NO
or V
NC
= 0V to V+,
(See Figure 5)
25 - 0.55 - Ω
Full - 0.6 - Ω
DYNAMIC CHARACTERISTICS
Turn-ON Time, t
ON
V+ = 1.65V, V
NO
or V
NC
= 1.0V, R
L
=50Ω, C
L
= 35pF,
(See Figure 1)
25 - 70 - ns
Full - 80 - ns
Turn-OFF Time, t
OFF
V+ = 1.65V, V
NO
or V
NC
= 1.0V, R
L
=50Ω, C
L
= 35pF,
(See Figure 1)
25 - 54 - ns
Full - 65 - ns
Break-Before-Make Time Delay, t
D
V+ = 2.0V, V
NO
or V
NC
= 1.0V, R
L
=50Ω, C
L
= 35pF,
(See Figure 3)
Full - 10 - ns
Charge Injection, Q C
L
= 1.0nF, V
G
= 0V, R
G
= 0Ω, (See Figure 2) 25 - 42 - pC
OFF Isolation R
L
= 50Ω, C
L
= 5pF, f = 100kHz, V
COM
= 1V
RMS
,
(See Figure 4)
25 - 68 - dB
Crosstalk (Channel-to-Channel) R
L
= 50Ω, C
L
= 5pF, f = 100kHz, V
COM
= 1V
RMS
,
(See Figure 6)
25 - -95 - dB
NO or NC OFF Capacitance, C
OFF
f = 1MHz, V
NO
or V
NC
= V
COM
= 0V, (See Figure 7) 25 - 70 - pF
COM ON Capacitance, C
COM(ON)
f = 1MHz, V
NO
or V
NC
= V
COM
= 0V, (See Figure 7) 25 - 186 - pF
DIGITAL INPUT CHARACTERISTICS
Input Voltage Low, V
INL
Full - - 0.4 V
Input Voltage High, V
INH
Full 1.0 - - V
Input Current, I
INH
, I
INL
V+ = 2.0V, V
IN
= 0V or V+ (See Note 9) Full -0.5 - 0.5 μA
NOTES:
4. V
IN
= input voltage to perform proper function.
5. The algebraic convention, whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
6. Parts are 100% tested at +25°C. Over-temperature limits established by characterization and are not production tested.
7. Flatness is defined as the difference between maximum and minimum value of on-resistance over the specified analog signal range.
8. r
ON
matching between channels is calculated by subtracting the channel with the highest max r
ON
value from the channel with lowest max r
ON
value, between NC1 and NC2 or between NO1 and NO2.
9. Limits established by characterization and are not production tested.
Electrical Specifications - 3V Supply Test Conditions: V+ = +2.7V to +3.3V, GND = 0V, V
INH
= 1.4V, V
INL
= 0.4V (Note 4),
Unless Otherwise Specified
.
PARAMETER TEST CONDITIONS
TEMP
(°C)
MIN
(Notes 5, 6) TYP
MAX
(Notes 5, 6) UNITS
ISL84684
5
FN6088.5
July 31, 2007
Test Circuits and Waveforms
Logic input waveform is inverted for switches that have the opposite
logic sense.
FIGURE 1A. MEASUREMENT POINTS
Repeat test for all switches. C
L
includes fixture and stray
capacitance.
FIGURE 1B. TEST CIRCUIT
FIGURE 1. SWITCHING TIMES
FIGURE 2A. MEASUREMENT POINTS
FIGURE 2B. TEST CIRCUIT
FIGURE 2. CHARGE INJECTION
FIGURE 3A. MEASUREMENT POINTS
Repeat test for all switches. C
L
includes fixture and stray
capacitance.
FIGURE 3B. TEST CIRCUIT
FIGURE 3. BREAK-BEFORE-MAKE TIME
50%
t
r
< 5ns
t
f
< 5ns
t
OFF
90%
V+
0V
V
NO
0V
t
ON
LOGIC
INPUT
SWITCH
INPUT
SWITCH
OUTPUT
90%
V
OUT
V
OUT
V
(NO or NC)
R
L
R
L
r
ON
+
------------------------
=
SWITCH
INPUT
LOGIC
INPUT
V
OUT
R
L
C
L
COM
NO or NC
IN
50Ω
35pF
GND
V+
C
V
OUT
ΔV
OUT
ON
OFF
ON
Q = ΔV
OUT
x C
L
SWITCH
OUTPUT
LOGIC
INPUT
V+
0V
C
L
V
OUT
R
G
V
G
GND
COM
NO or NC
V+
C
LOGIC
INPUT
IN
Repeat test for all switches.
90%
V+
0V
t
D
LOGIC
INPUT
SWITCH
OUTPUT
0V
V
OUT
LOGIC
INPUT
IN
COM
R
L
C
L
V
OUT
35pF
50Ω
NO
NC
V+
GND
V
NX
C
ISL84684
6
FN6088.5
July 31, 2007
Detailed Description
The ISL84684 is a bidirectional, dual single pole/double
throw (SPDT) analog switch that offers precise switching
capability from a single 1.65V to 3.6V supply with low
ON-resistance (0.35Ω) and high speed operation
(t
ON
=50ns, t
OFF
= 27ns). The device is especially well
suited for portable battery powered equipment due to its low
operating supply voltage (1.65V), low power consumption
(2.7µW max), low leakage currents (60nA max), and its tiny
TDFN and MSOP packages. The ultra low ON-resistance and
r
ON
flatness provide very low insertion loss and distortion to
applications that require signal reproduction.
External V+ Series Resistor
For improved ESD and latch-up immunity, Intersil
recommends adding a 100Ω resistor in series with the V+
power supply pin of the ISL84684 IC (see Figure 8).
FIGURE 4. OFF ISOLATION TEST CIRCUIT FIGURE 5. r
ON
TEST CIRCUIT
FIGURE 6. CROSSTALK TEST CIRCUIT FIGURE 7. CAPACITANCE TEST CIRCUIT
Test Circuits and Waveforms (Continued)
ANALYZER
R
L
SIGNAL
GENERATOR
V+
C
0V or V+
NO or NC
COM
IN
GND
Signal direction through switch is reversed, worst case values
are recorded. Repeat test for all switches.
V+
C
0V or V+
NO or NC
COM
IN
GND
V
NX
V
1
r
ON
= V
1
/100mA
100mA
Repeat test for all switches.
0V or V+
ANALYZER
V+
C
NO or NC
SIGNAL
GENERATOR
R
L
GND
IN
1
COM
50Ω
NC
COM
NC or NO
Signal direction through switch is reversed; worst case values
are recorded. Repeat test for all switches.
V+
C
GND
NO or NC
COM
IN
IMPEDANCE
ANALYZER
0V or V+
Repeat test for all switches.
FIGURE 8. V+ SERIES RESISTOR FOR ENHANCED ESD AND
LATCH-UP IMMUNITY
IN
COM
100Ω
NO
NC
V+
GND
C
OPTIONAL
PROTECTION
RESISTOR
ISL84684

ISL84684IRZ

Mfr. #:
Manufacturer:
Renesas / Intersil
Description:
Analog Switch ICs SWITCH DL SPDT 0 4OHM S 1 65V 3 6V
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
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