LTC2601/LTC2611/LTC2621
7
2601fb
TYPICAL PERFORMANCE CHARACTERISTICS
Zero-Scale Error vs Temperature Gain Error vs Temperature Offset Error vs V
CC
Gain Error vs V
CC
I
CC
Shutdown vs V
CC
Large-Signal Response
Current Limiting Load Regulation Offset Error vs Temperature
LTC2601/LTC2611/LTC2621
I
OUT
(mA)
–40
–30 –20 –10 0 10 20 30 40
ΔV
OUT
(V)
2601 G17
0.10
0.08
0.06
0.04
0.02
0
–0.02
–0.04
–0.06
–0.08
–0.10
V
REF
= V
CC
= 5V
V
REF
= V
CC
= 3V
V
REF
= V
CC
= 5V
V
REF
= V
CC
= 3V
CODE = MIDSCALE
I
OUT
(mA)
–35 –25 –15 –5 5 15 25 35
ΔV
OUT
(mV)
2601 G18
1.0
0.8
0.6
0.4
0.2
0
–0.2
–0.4
–0.6
–0.8
–1.0
V
REF
= V
CC
= 5V
CODE = MIDSCALE
V
REF
= V
CC
= 3V
TEMPERATURE (°C)
–50
–30 –10 10 30 50 70 90
OFFSET ERROR (mV)
2601 G19
3
2
1
0
–1
–2
–3
TEMPERATURE (°C)
–50
–30 –10 10 30 50 70 90
ZERO-SCALE ERROR (mV)
2601 G20
3
2.5
2.0
1.5
1.0
0.5
0
TEMPERATURE (°C)
–50
–30 –10 10 30 50 70 90
GAIN ERROR (%FSR)
2601 G21
0.4
0.3
0.2
0.1
0
–0.1
–0.2
–0.3
–0.4
V
CC
(V)
2.5 3
3.5 4 4.5 5 5.5
GAIN ERROR (%FSR)
2601 G23
0.4
0.3
0.2
0.1
0
–0.1
–0.2
–0.3
–0.4
V
CC
(V)
2.5 3
3.5 4 4.5 5 5.5
OFFSET ERROR (mV)
2601 G22
3
2
1
0
–1
–2
–3
V
CC
(V)
2.5 3
3.5 4 4.5 5 5.5
I
CC
(nA)
2601 G24
450
400
350
300
250
200
150
100
50
0
2.5μs/DIV
V
OUT
0.5V/DIV
2601 G25
V
REF
= V
CC
= 5V
1/4-SCALE TO 3/4-SCALE
LTC2601/LTC2611/LTC2621
8
2601fb
TYPICAL PERFORMANCE CHARACTERISTICS
Supply Current vs Logic Voltage Hardware CLR to Zero Scale Hardware CLR to Midscale
Power-On Reset to Midscale Multiplying Bandwidth
Output Voltage Noise,
0.1Hz to 10Hz
Midscale Glitch Impulse
Power-On Reset Glitch
to Zero Scale
Headroom at Rails
vs Output Current
LTC2601/LTC2611/LTC2621
V
OUT
10mV/DIV
CS/LD
5V/DIV
2.5μs/DIV
2601 G26
12nV-s TYP
V
OUT
10mV/DIV
250μs/DIV
2601 G27
V
CC
1V/DIV
4mV PEAK
I
OUT
(mA)
0
1 2 3 4 5 6 7 8 910
V
OUT
(V)
2601 G28
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
5V SOURCING
3V SOURCING
3V SINKING
5V SINKING
LOGIC VOLTAGE (V)
0
0
I
CC
(mA)
0.2
0.6
0.8
1.0
1.4
0.5
2.5
3.5
2601 G29
0.4
1.2
2
4.5
5
1
1.5
34
V
CC
= 5V
SWEEP SCK, SDI
AND CS/LD
0V TO V
CC
V
OUT
1V/DIV
1μs/DIV
2601 G31
CLR
5V/DIV
V
CC
= 5V
V
REF
= 4.096V
CODE = FULL SCALE
V
OUT
1V/DIV
1μs/DIV
2601 G34
CLR
5V/DIV
V
CC
= 5V
V
REF
= 4.096V
CODE = FULL SCALE
1V/DIV
V
REF
= V
CC
V
CC
V
OUT
500μs/DIV
2601 G35
FREQUENCY (Hz)
1k
dB
0
–3
–6
–9
–12
–15
–18
–21
–24
–27
–30
–33
–36
1M
2601 G32
10k 100k
V
CC
= 5V
V
REF
(DC) = 2V
V
REF
(AC) = 0.2V
P-P
CODE = FULL SCALE
V
OUT
10μV/DIV
SECONDS
012345678910
2601 G33
LTC2601/LTC2611/LTC2621
9
2601fb
PIN FUNCTIONS
SDO (Pin 1): Serial Interface Data Output. This pin is used
for daisy-chain operation. The serial output of the shift
register appears at the SDO pin. The data transferred to
the device via the SDI pin is delayed 32 SCK rising edges
before being output at the next falling edge. SDO is an
active output and does not go high impedance even when
CS/LD is taken to a logic high level.
SDI (Pin 2): Serial Interface Data Input. Data is applied
to SDI for transfer to the device at the rising edge of SCK
(Pin 3). The LTC2601 accepts input word lengths of either
24 or 32 bits.
SCK (Pin 3): Serial Interface Clock Input. CMOS and TTL
compatible.
CLR (Pin 4): Asynchronous Clear Input. A logic low at this
level-triggered input clears all registers and causes the
DAC voltage outputs to drop to 0V for LTC2601/LTC2611/
LTC2621. A logic low at this input sets all registers to
midscale code and causes the DAC voltage outputs to go
to midscale for LTC2601-1/LTC2611-1/LTC2621-1. CMOS
and TTL compatible.
CS/LD (Pin 5): Serial Interface Chip Select/Load Input.
When CS/LD is low, SCK is enabled for shifting data on
SDI into the register. When CS/LD is taken high, SCK
is disabled and the specifi ed command (see Table 1) is
executed.
REF (Pin 6): Reference Voltage Input. 0V ≤ V
REF
≤ V
CC
.
V
OUT
(Pin 7): DAC Analog Voltage Output. The output
range is 0V to V
REF
.
GND (Pin 8): Analog Ground.
V
CC
(Pin 9): Supply Voltage Input. 2.5V ≤ V
CC
≤ 5.5V.
LDAC (Pin 10): Asynchronous DAC Update Pin. If CS/LD
is high, a falling edge on LDAC immediately updates the
DAC register with the contents of the input register (similar
to a software update). If CS/LD is low when LDAC goes
low, the DAC register is updated after CS/LD returns high.
A low on the LDAC pin powers up the DAC. A software
power down command is ignored if LDAC is low.
Exposed Pad (Pin 11): Ground. Must be soldered to PCB
ground.
TYPICAL PERFORMANCE CHARACTERISTICS
Short-Circuit Output Current vs
V
OUT
(Sinking)
Short-Circuit Output Current vs
V
OUT
(Sourcing)
LTC2601/LTC2611/LTC2621
1V/DIV
0
0
10mA/DIV
10
20
30
40
50
1
234
2601 G15
56
V
CC
= 5.5V
V
REF
= 5.6V
CODE = 0
V
OUT
SWEPT 0V TO V
CC
1V/DIV
0
–50
10mA/DIV
–40
–30
–20
–10
0
1
234
2601 G16
56
V
CC
= 5.5V
V
REF
= 5.6V
CODE = FULL SCALE
V
OUT
SWEPT V
CC
TO 0V

LTC2601CDD#TRPBF

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Digital to Analog Converters - DAC 16-B R2R DACs in 10-Lead DFN
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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