74LCX573
4/10
DC SPECIFICATIONS
DYNAMIC SWITCHING CHARACTERISTICS
1) Number of outputs defined as "n". Measured with "n-1" outputs switching from HIGH to LOW or LOW to HIGH. The remaining output is
measured in the LOW state.
Symbol Parameter
Test Condition Value
Unit
V
CC
(V)
-40 to 85 °C -55 to 125 °C
Min. Max. Min. Max.
V
IH
High Level Input
Voltage
2.7 to 3.6
2.0 2.0 V
V
IL
Low Level Input
Voltage
0.8 0.8 V
V
OH
High Level Output
Voltage
2.7 to 3.6
I
O
=-100 µAV
CC
-0.2 V
CC
-0.2
V
2.7
I
O
=-12 mA
2.2 2.2
3.0
I
O
=-18 mA
2.4 2.4
I
O
=-24 mA
2.2 2.2
V
OL
Low Level Output
Voltage
2.7 to 3.6
I
O
=100 µA
0.2 0.2
V
2.7
I
O
=12 mA
0.4 0.4
3.0
I
O
=16 mA
0.4 0.4
I
O
=24 mA
0.55 0.55
I
I
Input Leakage
Current
2.7 to 3.6
V
I
= 0 to 5.5V
± 5 ± 5 µA
I
off
Power Off Leakage
Current
0
V
I
or V
O
= 5.5V
10 10 µA
I
OZ
High Impedance
Output Leakage
Current
2.7 to 3.6
V
I
= V
IH
or V
IL
V
O
= 0 to V
CC
± 5 ± 5 µA
I
CC
Quiescent Supply
Current
2.7 to 3.6
V
I
= V
CC
or GND
10 10
µA
V
I
or V
O
= 3.6 to 5.5V
± 10 ± 10
I
CC
I
CC
incr. per Input
2.7 to 3.6
V
IH
= V
CC
- 0.6V
500 500 µA
Symbol Parameter
Test Condition Value
Unit
V
CC
(V)
T
A
= 25 °C
Min. Typ. Max.
V
OLP
Dynamic Low Level Quiet
Output (note 1)
3.3
C
L
= 50pF
V
IL
= 0V, V
IH
= 3.3V
0.8
V
V
OLV
-0.8
74LCX573
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AC ELECTRICAL CHARACTERISTICS
1) Skew is defined as the absolute value of the difference between the actual propagation delay for any two outputs of the same device switch-
ing in the same direction, either HIGH or LOW (t
OSLH
= | t
PLHm
- t
PLHn
|, t
OSHL
= | t
PHLm
- t
PHLn
|)
2) Parameter guaranteed by design
CAPACITIVE CHARACTERISTICS
1) C
PD
is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. I
CC(opr)
= C
PD
x V
CC
x f
IN
+ I
CC
/8 (per latch)
Symbol Parameter
Test Condition Value
Unit
V
CC
(V)
C
L
(pF)
R
L
()
t
s
= t
r
(ns)
-40 to 85 °C -55 to 125 °C
Min. Max. Min. Max.
t
PLH
t
PHL
Propagation Delay
Time (Dn to Qn)
2.7
50 500 2.5
1.5 9.0 1.5 9.0
ns
3.0 to 3.6 1.5 8.0 1.5 8.0
t
PLH
t
PHL
Propagation Delay
Time (LE to Qn)
2.7
50 500 2.5
1.5 9.5 1.5 9.5
ns
3.0 to 3.6 1.5 8.5 1.5 8.5
t
PZL
t
PZH
Output Enable Time
to HIGH and LOW
level
2.7
50 500 2.5
1.5 9.5 1.5 9.5
ns
3.0 to 3.6 1.5 8.5 1.5 8.5
t
PLZ
t
PHZ
Output Disable Time
from HIGH to LOW
level
2.7
50 500 2.5
1.5 8.5 1.5 8.5
ns
3.0 to 3.6 1.5 7.5 1.5 7.5
t
S
Set-Up Time, HIGH
or LOW level
(Dn to LE)
2.7
50 500 2.5
2.5 2.5
ns
3.0 to 3.6 2.5 2.5
t
h
Hold Time, HIGH or
LOW level
(Dn to LE)
2.7
50 500 2.5
1.5 1.5
ns
3.0 to 3.6 1.5 1.5
t
W
LE Pulse Width,
HIGH
2.7
50 500 2.5
3.3 3.3
ns
3.0 to 3.6 3.3 3.3
t
OSLH
t
OSHL
Output To Output
Skew Time (note1,
2)
3.0 to 3.6 50 500 2.5 1.0 1.0 ns
Symbol Parameter
Test Condition Value
Unit
V
CC
(V)
T
A
= 25 °C
Min. Typ. Max.
C
IN
Input Capacitance
3.3
V
IN
= 0 to V
CC
6pF
C
OUT
Output Capacitance
3.3
V
IN
= 0 to V
CC
12 pF
C
PD
Power Dissipation Capacitance
(note 1)
3.3 f
IN
= 10MHz
V
IN
= 0 or V
CC
25
pF
74LCX573
6/10
TEST CIRCUIT
C
L
= 50 pF or equivalent (includes jig and probe capacitance)
R
L
= R1 = 500 or equivalent
R
T
= Z
OUT
of pulse generator (typically 50)
WAVEFORM 1 : LE TO Qn PROPAGATION DELAYS, LE PULSE WIDTH, Dn TO LE SETUP AND
HOLD TIMES (f=1MHz; 50% duty cycle)
TEST SWITCH
t
PLH
, t
PHL
Open
t
PZL
, t
PLZ
6V
t
PZH
, t
PHZ
GND

74LCX573TTR

Mfr. #:
Manufacturer:
STMicroelectronics
Description:
Latches Quad "D" Flip-Flop
Lifecycle:
New from this manufacturer.
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