MC10EPT20DTR2

© Semiconductor Components Industries, LLC, 2016
August, 2016 Rev. 12
1 Publication Order Number:
MC10EPT20/D
MC10EPT20, MC100EPT20
3.3V LVTTL/LVCMOS to
Differential LVPECL
Translator
The MC10EPT20 is a 3.3 V TTL/CMOS to differential PECL
translator. Because PECL (Positive ECL) levels are used, only +3.3 V
and ground are required. The small outline SOIC8 NB package and the
single gate of the EPT20 makes it ideal for those applications where
space, performance, and low power are at a premium.
The 100 Series contains temperature compensation.
Features
390 ps Typical Propagation Delay
Maximum Input Clock Frequency > 1 GHz Typical
Operating Range:
V
CC
= 3.0 V to 3.6 V with GND = 0 V
PNP TTL Input for Minimal Loading
Q Output will Default HIGH with Input Open
These Devices are Pb-Free, Halogen Free and are RoHS Compliant
A = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week
G = Pb-Free Package
H = MC10
K = MC100
5W = MC10
3Q = MC100
M
= Date Code
MARKING DIAGRAMS*
ALYWG
G
HA20
ALYWG
G
KA20
1
8
1
8
HPT20
ALYW
G
1
8
KPT20
ALYW
G
1
8
www.onsemi.com
5W MG
G
14
3Q MG
G
14
(Note: Microdot may be in either location)
*For additional marking information, refer to
Application Note AND8002/D
.
See detailed ordering and shipping information on page 7 of
this data sheet.
ORDERING INFORMATION
SOIC8NB
D SUFFIX
CASE
75107
TSSOP8
DT SUFFIX
CASE
948R02
1
8
1
8
DFN8
MN SUFFIX
CASE 506AA
MC10EPT20, MC100EPT20
www.onsemi.com
2
1
2
3
45
6
7
8
D
GND
V
CC
Q
NCQ
NC
NC
LVTTL
LVPECL
Table 1. PIN DESCRIPTION
PIN
Q, Q
D LVTTL Input
FUNCTION
Differential PECL Outputs
V
CC
GND Ground
Positive Supply
NC No Connect
Figure 1. 8Lead Pinout (Top View) and Logic Diagram
EP (DFN8 only) Thermal exposed
pad must be connected to a suffi-
cient thermal conduit. Electrically
connect to the most negative sup-
ply (GND) or leave unconnected,
floating open.
Table 2. ATTRIBUTES
Characteristics Value
Internal Input Pulldown Resistor N/A
Internal Input Pullup Resistor N/A
ESD Protection
Human Body Model
Machine Model
Charged Device Model
> 1.5 kV
> 200 V
> 2 kV
Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1) Pb-Free Pkg
SOIC8NB
TSSOP8
DFN8
Level 1
Level 3
Level 1
Flammability Rating
Oxygen Index: 28 to 34
UL 94 V0 @ 0.125 in
Transistor Count 150 Devices
Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
1. For additional information, see Application Note AND8003/D.
MC10EPT20, MC100EPT20
www.onsemi.com
3
Table 3. MAXIMUM RATINGS
Symbol Parameter Condition 1 Condition 2 Rating Unit
V
CC
Power Supply GND = 0 V 6 V
V
I
Input Voltage GND = 0 V V
I
V
CC
6 V
I
out
Output Current Continuous
Surge
50
100
mA
TA Operating Temperature Range 40 to +85 °C
T
stg
Storage Temperature Range 65 to +150 °C
q
JA
Thermal Resistance (Junction-to-Ambient) 0 lfpm
500 lfpm
SOIC8NB 190
130
°C/W
q
JC
Thermal Resistance (Junction-to-Case) Standard Board SOIC8NB 41 to 44 °C/W
q
JA
Thermal Resistance (Junction-to-Ambient) 0 lfpm
500 lfpm
TSSOP8 185
140
°C/W
q
JC
Thermal Resistance (Junction-to-Case) Standard Board TSSOP8 41 to 44 °C/W
q
JA
Thermal Resistance (Junction-to-Ambient) 0 lfpm
500 lfpm
DFN8 129
84
°C/W
T
sol
Wave Solder (Pb-Free) <2 to 3 sec @ 260°C 265 °C
q
JC
Thermal Resistance (Junction-to-Case) (Note 1) DFN8 35 to 40 °C/W
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. JEDEC standard multilayer board 2S2P (2 signal, 2 power)

MC10EPT20DTR2

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
Translation - Voltage Levels 3.3V TTL/CMOS
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union