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ADF4113BRU
P1-P3
P4-P6
P7-P9
P10-P12
P13-P15
P16-P18
P19-P21
P22-P24
P25-P27
P28-P28
ADF4110/ADF4111/ADF4112/
ADF4113
Data Sheet
Rev.
F
| P
age
16
of
28
Table
8
. AB Counter Latch Map
THESE BITS ARE NOT USED
BY THE DEVICE AND ARE
DON'T CARE BITS
A6
0
0
0
0
•
•
•
1
1
1
1
A5
0
0
0
0
•
•
•
1
1
1
1
A2
0
0
1
1
•
•
•
0
0
1
1
A1
0
1
0
1
•
•
•
0
1
0
1
A COUNTER
DIVIDE RATIO
0
1
2
3
•
•
•
60
61
62
63
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
B13
0
0
0
0
0
•
•
•
1
1
1
1
B12
0
0
0
0
0
•
•
•
1
1
1
1
B11
0
0
0
0
0
•
•
•
1
1
1
1
B3
B2
B1
B COUNTER DIVIDE RATIO
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
0
0
0
0
1
•
•
•
1
1
1
1
0
0
1
1
0
•
•
•
0
0
1
1
0
1
0
1
0
•
•
•
0
1
0
1
NOT ALLOWED
NOT ALLOWED
NOT ALLOWED
3
4
•
•
•
8188
8189
8190
8191
13-BIT B COUNTER
DB23
DB22
DB21
DB20
DB19
DB18
DB17
DB16
DB15
DB14
DB12
DB11
DB10
DB9
DB8
DB7
DB6
DB5
DB4
DB3
DB13
B13
B12
B11
B8
B7
B6
B5
B4
B2
B1
A6
A5
A4
A3
A2
A1
B3
6-BIT A COUNTER
RESERVED
DB2
G1
B10
B9
N
I
A
G
P
C
*SEE TABLE 9
F4 (FUNCTION LATCH)
FASTLOCK ENABLE*
CP GAIN
OPERATION
0
0
1
1
0
1
0
1
CHARGE PUMP CURRENT SETTING 1
IS PERMANENTLY USED.
CHARGE PUMP CURRENT SETTING 2
IS PERMANENTLY USED.
CHARGE PUMP CURRENT SETTING 1
IS USED.
CHARGE PUMP CURRENT IS SWITCHED
TO SETTING 2. THE TIME SPENT IN
SETTING 2 IS DEPENDENT UPON WHICH
FASTLOCK MODE IS USED. SEE FUNCTION
LATCH DESCRIPTION.
N = BP + A, P IS PRESCALER VALUE SET IN THE
FUNCTION LATCH, B MUST BE GREATER THAN OR
EQUAL TO A. FOR CONTINUOUSLY ADJACENT VALUES
OF (N
X
F
REF
), AT THE OUTPUT, N
MIN
IS (P
2
–P).
X
X = DON'T CARE
X
C2 (0)
C1 (1)
CONTROL
BITS
DB1
DB0
03496-0-035
Data Sheet
ADF4110/ADF4111/ADF4112/
ADF4113
Rev.
F
| P
age
17
of
28
Table
9
. Function Latch Map
M3
0
0
0
0
1
1
1
1
M2
0
0
1
1
0
0
1
1
M1
0
1
0
1
0
1
0
1
OUTPUT
THREE-STATE OUTPUT
DIGITAL LOCK DETECT
(ACTIVE HIGH)
N DIVIDER OUTPUT
DV
DD
R DIVIDER OUTPUT
ANALOG LOCK DETECT
(N-CHANNEL OPEN-DRAIN)
SERIAL DATA OUTPUT
DGND
F1
0
1
COUNTER
OPERATION
NORMAL
R, A, B COUNTERS
HELD IN RESET
F2
0
1
PHASE DETECTOR
POLARITY
NEGATIVE
POSITIVE
F3
0
1
CHARGE PUMP OUTPUT
NORMAL
THREE-STATE
0
1
1
1
CE PIN
PD2
PD1
MODE
ASYNCHRONOUS POWER-DOWN
NORMAL OPERATION
ASYNCHRONOUS POWER-DOWN
SYNCHRONOUS POWER-DOWN
X
X
0
1
X
0
1
1
F5
X
0
1
FASTLOCK MODE
FASTLOCK DISABLED
FASTLOCK MODE 1
FASTLOCK MODE 2
F4
0
1
1
P1
0
1
0
1
PRESCALER VALUE
8/9
16/17
32/33
64/65
P2
0
0
1
1
CPI6
CPI3
CPI5
CPI2
CPI4
CPI1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
I
CP
(mA)
2.7k
Ω
4.7k
Ω
10k
Ω
1.09
2.18
3.26
4.35
5.44
6.53
7.62
8.70
0.63
1.25
1.88
2.50
3.13
3.75
4.38
5.00
0.29
0.59
0.88
1.76
1.47
1.76
2.06
2.35
CURRENT
SETTING
2
DB23
DB22
DB21
DB20
DB19
DB18
DB17
DB16
DB15
DB14
DB12
DB11
DB10
DB9
DB8
DB7
DB6
DB5
DB4
DB3
DB13
CPI6
CPI5
CPI4
CPI1
TC4
TC3
TC2
TC1
F4
F3
F2
M3
M2
M1
PD1
F1
C2(1)
C1(0)
F5
CONTROL
BITS
PRESCALER
VALUE
DB2
DB1
DB0
PD2
P1
CPI3
CPI2
-
R
E
W
O
P
2
N
W
O
D
CURRENT
SETTING
1
TIMER COUNTER
CONTROL
K
C
O
L
T
S
A
F
E
D
O
M
K
C
O
L
T
S
A
F
E
L
B
A
N
E
P
C
E
T
A
T
S
-
E
E
R
H
T
D
P
Y
T
I
R
A
L
O
P
MUXOUT
CONTROL
-
R
E
W
O
P
1
N
W
O
D
R
E
T
N
U
O
C
T
E
S
E
R
P2
TC4
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
TC3
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
TC2
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
TC1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
TIMEOUT
(PFD CYCLES)
3
7
11
15
19
23
27
31
35
39
43
47
51
55
59
63
SEE FUNCTION LATCH,
TIMER COUNTER CONTROL
SECTION
03496-0-036
ADF4110/ADF4111/ADF4112/
ADF4113
Data Sheet
Rev.
F
| P
age
18
of
28
Table
10
. I
nitial
iza
ti
on Lat
ch Map
M3
0
0
0
0
1
1
1
1
M2
0
0
1
1
0
0
1
1
M1
0
1
0
1
0
1
0
1
OUTPUT
THREE-STATE OUTPUT
DIGITAL LOCK DETECT
(ACTIVE HIGH)
N DIVIDER OUTPUT
DV
DD
R DIVIDER OUTPUT
ANALOG LOCK DETECT
(N-CHANNEL OPEN-DRAIN)
SERIAL DATA OUTPUT
DGND
TC4
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
TC3
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
TC2
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
TC1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
TIMEOUT
(PFD CYCLES)
3
7
11
15
19
23
27
31
35
39
43
47
51
55
59
63
F1
0
1
COUNTER
OPERATION
NORMAL
R, A, B COUNTERS
HELD IN RESET
F2
0
1
PHASE DETECTOR
POLARITY
NEGATIVE
POSITIVE
F3
0
1
CHARGE PUMP
OUTPUT NORMAL
THREE-STATE
0
1
1
1
CE PIN
PD2
PD1
MODE
ASYNCHRONOUS POWER-DOWN
NORMAL OPERATION
ASYNCHRONOUS POWER-DOWN
SYNCHRONOUS POWER-DOWN
X
X
0
1
X
0
1
1
F5
X
0
1
FASTLOCK MODE
FASTLOCK DISABLED
FASTLOCK MODE 1
FASTLOCK MODE 2
F4
0
1
1
P1
0
1
0
1
PRESCALER VALUE
8/9
16/17
32/33
64/65
P2
0
0
1
1
CPI6
CPI3
CPI5
CPI2
CPI4
CPI1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
I
CP
(mA)
2.7k
Ω
4.7k
Ω
10k
Ω
1.09
2.18
3.27
4.35
5.44
6.53
7.62
8.70
0.63
1.25
1.88
2.50
3.13
3.75
4.38
5.00
0.29
0.59
0.88
1.76
1.47
1.76
2.06
2.35
CURRENT
SETTING
2
DB23
DB22
DB21
DB20
DB19
DB18
DB17
DB16
DB15
DB14
DB12
DB11
DB10
DB9
DB8
DB7
DB6
DB5
DB4
DB3
DB13
CPI6
CPI5
CPI4
CPI1
TC4
TC3
TC2
TC1
F4
F3
F2
M3
M2
M1
PD1
F1
C2 (1)
C1 (1)
F5
CONTROL
BITS
PRESCALER
VALUE
DB2
DB1
DB0
PD2
P1
CPI3
CPI2
-
R
E
W
O
P
2
N
W
O
D
CURRENT
SETTING
1
TIMER COUNTER
CONTROL
K
C
O
L
T
S
A
F
E
D
O
M
K
C
O
L
T
S
A
F
E
L
B
A
N
E
P
C
E
T
A
T
S
-
E
E
R
H
T
D
P
Y
T
I
R
A
L
O
P
MUXOUT
CONTROL
-
R
E
W
O
P
1
N
W
O
D
R
E
T
N
U
O
C
T
E
S
E
R
P2
SEE FUNCTION LATCH,
TIMER COUNTER CONTROL
SECTION
03496-0-037
P1-P3
P4-P6
P7-P9
P10-P12
P13-P15
P16-P18
P19-P21
P22-P24
P25-P27
P28-P28
ADF4113BRU
Mfr. #:
Buy ADF4113BRU
Manufacturer:
Description:
Phase Locked Loops - PLL SGL Integer-N 4.0 GHz
Lifecycle:
New from this manufacturer.
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