RT9030-10GQW

RT9030
7
DS9030-05 November 2016 www.richtek.com
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Copyright 2016 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.
Applications Information
Capacitor Selection
In order to confirm the regulator stability and performance,
X7R/X5R or other better quality ceramic capacitor should
be selected.
Like any low-dropout regulator, the external capacitors used
with the RT9030 must be carefully selected for regulator
stability and performance. Using a capacitor whose value
is larger than 1μF on the RT9030 input and the amount of
capacitance can be increased without limit. The input
capacitor should be located in a distance of no more than
0.5 inch from the input pin of the IC and returned to a
clean analog ground. The capacitor with larger value and
lower ESR (equivalent series resistance) provides better
PSRR and line-transient response.
The output capacitor must meet both requirements for
minimum amount of capacitance in all LDOs application.
The RT9030 is designed specifically to work with low ESR
ceramic output capacitor in space-saving and performance
consideration. Using a ceramic capacitor whose value is
at least 1μF on the RT9030 output ensures stability. Output
capacitor with larger capacitance can reduce noise and
improve load transient response, stability, and PSRR. The
output capacitor should be located in a distance of no
more than 0.5 inch from the VOUT pin of the RT9030 and
returned to a clean analog ground.
Enable
The RT9030 goes into shutdown mode when the EN pin
is in a logic low condition. During this condition, the pass
transistor, error amplifier, and bandgap are turned off,
reducing the supply current to 0.7μA typical. The EN pin
can be directly tied to VIN to keep the part on.
Current limit
The RT9030 contains an independent current limiter, which
monitors and controls the pass transistor's gate voltage,
limiting the output current to 285mA (typ.). The output
can be shorted to ground indefinitely without damaging
the part.
Thermal Shutdown Protection
As the die temperature is > 150°C , the chip will enter
protection mode. The power MOSFET will turn-off during
protection mode to prevent abnormal operation.
Thermal Considerations
Thermal protection limits power dissipation in the RT9030.
When the operation junction temperature exceeds 170°C
, the OTP circuit starts the thermal shutdown function
and turns the pass element off. The pass element turn on
again after the junction temperature cools by 30°C.
For continuous operation, do not exceed absolute
maximum operation junction temperature 125°C. The
power dissipation definition in device is :
P
D
= (V
IN
V
OUT
) x I
OUT
+ V
IN
x I
Q
The maximum power dissipation depends on the thermal
resistance of IC package, PCB layout, the rate of
surroundings airflow and temperature difference between
junction to ambient. The maximum power dissipation can
be calculated by following formula :
P
D(MAX)
= ( T
J(MAX)
T
A
) / θ
JA
Where T
J(MAX)
is the maximum operation junction
temperature, T
A
is the ambient temperature and the θ
JA
is
the junction to ambient thermal resistance.
For recommended operating conditions specification the
maximum junction temperature of the die is 125°C. The
junction to ambient thermal resistance θ
JA
for WDFN-6L
1.6x1.6 package is 165°C/W and SC-70-5 package is
333°C/W on the standard JEDEC 51-3 single-layer thermal
test board. The maximum power dissipation at T
A
= 25°C
can be calculated by following formula :
P
D(MAX)
= (125°C 25°C) / (165°C/W) = 0.606W for
WDFN-6L 1.6x1.6 packages
P
D(MAX)
= (125°C 25°C) / (333°C/W) = 0.300W for
SC-70-5 packages
The maximum power dissipation depends on operating
ambient temperature for fixed T
J(MAX)
and thermal
resistance θ
JA
. The Figure 3 of derating curves allows the
RT9030
8
DS9030-05 November 2016www.richtek.com
©
Copyright 2016 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.
Layout Considerations
Careful PCB Layout is necessary for better performance.
The following guidelines should be followed for good PCB
layout.
Place the input and output capacitors as close as
possible to the IC.
Keep VIN and VOUT trace as possible as short and wide.
Use a large PCB ground plane for maximum thermal
dissipation.
Figure 4
designer to see the effect of rising ambient temperature
on the maximum power allowed.
Figure 3. Derating Curve of Maximum Power Dissipation
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0255075100125
Ambient Temperature (°C)
Power Dissipation (W)
SC-70-5
Single Layer PCB
WDFN-6L 1.6x1.6
VIN
GND
EN
VOUT
2
3
5
4
1
NC
V
IN
C
IN
V
OUT
GND
C
OUT
The through hole of the GND pin is
recommended to be as many as possible.
C
IN
should be placed as close
as possible to VIN pin for good
filtering.
C
OUT
should be placed as close
as possible to VOUT pin for good
filtering.
RT9030
9
DS9030-05 November 2016 www.richtek.com
©
Copyright 2016 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation.
A
A1
e
b
B
D
C
H
L
SC-70-5 Surface Mount Package
Dimensions In Millimeters Dimensions In Inches
Symbol
Min Max Min Max
A 0.800 1.100 0.031 0.044
A1 0.000 0.100 0.000 0.004
B 1.150 1.350 0.045 0.054
b 0.150 0.400 0.006 0.016
C 1.800 2.450 0.071 0.096
D 1.800 2.250 0.071 0.089
e 0.650 0.026
H 0.080 0.260 0.003 0.010
L 0.210 0.460 0.008 0.018
Outline Dimension

RT9030-10GQW

Mfr. #:
Manufacturer:
Description:
IC REG LINEAR 1V 150MA 6WDFN
Lifecycle:
New from this manufacturer.
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