ADR440/ADR441/ADR443/ADR444/ADR445 Data Sheet
Rev. F | Page 14 of 18
THEORY OF OPERATION
The ADR44x series of references uses a new reference generation
technique known as XFET (eXtra implanted junction FET).
This technique yields a reference with low dropout, good
thermal hysteresis, and exceptionally low noise. The core of the
XFET reference consists of two junction field-effect transistors
(JFETs), one of which has an extra channel implant to raise its
pinch-off voltage. By running the two JFETs at the same drain
current, the difference in pinch-off voltage can be amplified
and used to form a highly stable voltage reference.
The intrinsic reference voltage is around 0.5 V with a negative
temperature coefficient of about –120 ppm/°C. This slope is
essentially constant to the dielectric constant of silicon, and it can
be closely compensated for by adding a correction term generated
in the same fashion as the proportional-to-absolute temperature
(PTAT) term used to compensate band gap references. The
advantage of an XFET reference is its correction term, which is
approximately 20 times lower and requires less correction than
that of a band gap reference. Because most of the noise of a band
gap reference comes from the temperature compensation
circuitry, the XFET results in much lower noise.
Figure 33 shows the basic topology of the ADR44x series. The
temperature correction term is provided by a current source with
a value designed to be proportional to the absolute temperature.
The general equation is
V
OUT
= G (V
P
− R1 × I
PTAT
) (1)
where:
G is the gain of the reciprocal of the divider ratio.
∆V
P
is the difference in pinch-off voltage between the two JFETs.
I
PTAT
is the positive temperature coefficient correction current.
ADR44x devices are created by on-chip adjustment of R2
and R3 to achieve the different voltage options at the
reference output.
I
PTAT
I
1
*
I
1
*EXTRA CHANNEL IMPLANT
V
OUT
= G (∆V
P
– R1 × I
PT AT
)
R2
IN
V
OUT
GND
R3
R1
∆V
P
05428-033
ADR44x
Figure 33. Simplified Schematic Device
POWER DISSIPATION CONSIDERATIONS
The ADR44x family of references is guaranteed to deliver load
currents to 10 mA with an input voltage that ranges from 3 V to
18 V. When these devices are used in applications at higher
currents, use the following equation to account for the
temperature effects of increases in power dissipation:
T
J
= P
D
× θ
JA
+ T
A
(2)
where:
T
J
and T
A
are the junction and ambient temperatures,
respectively.
P
D
is the device power dissipation.
θ
JA
is the device package thermal resistance.
BASIC VOLTAGE REFERENCE CONNECTIONS
The ADR44x family requires a 0.1 µF capacitor on the input
and the output for stability. Although not required for operation,
a 10 µF capacitor at the input can help with line voltage
transient performance.
NOTES
1. NC = NO CONNECT
2. TP = TEST PIN (DO NOT CONNECT)
05428-034
6
V
OUT
0.1µF
+
V
IN
10µF
0.1µF
TP
1
NC
3
4
TP
8
NC
7
TRIM
5
ADR440/
ADR441/
ADR443/
ADR444/
ADR445
TOP VIEW
(Not to Scale)
2
GND
Figure 34. Basic Voltage Reference Configuration
NOISE PERFORMANCE
The noise generated by the ADR44x family of references is
typically less than 1.4 µV p-p over the 0.1 Hz to 10.0 Hz band
for ADR440, ADR441, and ADR443. Figure 26 shows the 0.1 Hz
to 10 Hz noise of the ADR441, which is only 1.2 µV p-p. The
noise measurement is made with a band-pass filter composed of
a 2pole high-pass filter with a corner frequency at 0.1 Hz and a
2pole low-pass filter with a corner frequency at 10.0 Hz.
TURN-ON TIME
Upon application of power (cold start), the time required for
the output voltage to reach its final value within a specified
error band is defined as the turn-on settling time. Two compo-
nents normally associated with this are the time for the active
circuits to settle and the time for the thermal gradients on the
chip to stabilize. Figure 20 and Figure 21 show the turn-on and
turn-off settling times for the ADR441.
