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MC10H117MG

P1-P3P4-P6
Semiconductor Components Industries, LLC, 2006
February, 2006 − Rev. 7
1 Publication Order Number:
MC10H117/D
MC10H117
Dual 2−Wide 2−3−Input
OR−AND/OR−AND
Gate
Description
The MC10H117 dual 2−wide 2−3−input OR−AND/
OR−AND−Invert gate is a general purpose logic element designed for
use in data control, such as digital multiplexing or data distribution.
Pin 9 is common to both gates. This MECL 10H part is a
functional/pinout duplication of the standard MECL 10K family
part, with 100% improvement in propagation delay, and no increase in
power−supply current.
Features
• Propagation Delay, 1.0 ns Typical
• Power Dissipation 100 mW/Gate Typical (same as MECL 10K)
• Improved Noise Margin 150 mV (Over Operating Voltage and
Temperature Range)
• Voltage Compensated
• MECL 10K Compatible
• Pb−Free Packages are Available*
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
CDIP−16
L SUFFIX
CASE 620A
MARKING DIAGRAMS*
PDIP−16
P SUFFIX
CASE 648
http://onsemi.com
*For additional marking information, refer to
Application Note AND8002/D.
See detailed ordering and shipping information in the package
dimensions section on page 3 of this data sheet.
ORDERING INFORMATION
SOEIAJ−16
CASE 966
16
1
16
1
MC10H117P
AWLYYWWG
1
16
MC10H117L
AWLYYWW
A = Assembly Location
WL, L = Wafer Lot
YY, Y = Year
WW, W = Work Week
G= Pb−Free Package
10H117
ALYWG
PLLC−20
FN SUFFIX
CASE 775
20
1
10H117G
AWLYYWW
120
MC10H117
http://onsemi.com
2
Figure 1. Logic Diagram Figure 2. Pin Assignment
V
CC1
A
OUT
A
OUT
A1
IN
A1
IN
A2
IN
A2
IN
V
EE
V
CC2
B
OUT
B
OUT
B1
IN
B1
IN
B2
IN
B2
IN
A2
IN,
B2
IN
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
12
13
11
10
9
7
6
5
4
3
2
14
15
V
CC1
= PIN 1
V
CC2
= PIN 16
V
EE
= PIN 8
Pin assignment is for Dual−in−Line Package.
Table 1. MAXIMUM RATINGS
Symbol Characteristic Rating Unit
V
EE
Power Supply (V
CC
= 0) −8.0 to 0 Vdc
V
I
Input Voltage (V
CC
= 0) 0 to V
EE
Vdc
I
out
Output Current Continuous
Surge
50
100
mA
T
A
Operating Temperature Range 0 to +75 °C
T
stg
Storage Temperature Range Plastic
Ceramic
−55 to +150
−55 to +165
°C
°C
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit
values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied,
damage may occur and reliability may be affected.
Table 2. ELECTRICAL CHARACTERISTICS (V
EE
= −5.2 V ±5%) (Note 1)
0° 25° 75°
Symbol Characteristic Min Max Min Max Min Max Unit
I
E
Power Supply Current 29 26 29 mA
I
inH
Input Current High
Pins 4, 5, 12, 13
Pins 6, 7, 10, 11
Pin 9
465
545
710
275
320
415
275
320
415
mA
I
inL
Input Current Low 0.5 0.5 0.3
mA
V
OH
High Output Voltage −1.02 −0.84 −0.98 −0.81 −0.92 −0.735 Vdc
V
OL
Low Output Voltage −1.95 −1.63 −1.95 −1.63 −1.95 −1.60 Vdc
V
IH
High Input Voltage −1.17 −0.84 −1.13 −0.81 −1.07 −0.735 Vdc
V
IL
Low Input Voltage −1.95 −1.48 −1.95 −1.48 −1.95 −1.45 Vdc
1. Each MECL 10H series circuit has been designed to meet the dc specifications shown in the test table, after thermal equilibrium has been
established. The circuit is in a test socket or mounted on a printed circuit board and transverse air flow greater than 500 linear fpm is
maintained. Outputs are terminated through a 50 W resistor to −2.0 V.
MC10H117
http://onsemi.com
3
Table 3. AC CHARACTERISTICS
0° 25° 75°
Symbol Characteristic Min Max Min Max Min Max Unit
t
pd
Propagation Delay 0.45 1.35 0.45 1.35 0.5 1.5 ns
t
r
Rise Time 0.5 1.5 0.5 1.6 0.5 1.7 ns
t
f
Fall Time 0.5 1.5 0.5 1.6 0.5 1.7 ns
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
ORDERING INFORMATION
Device Package Shipping
†
MC10H117FN PLLC−20 46 Units / Rail
MC10H117FNG
PLLC−20
(Pb−Free)
46 Units / Rail
MC10H117FNR2 PLLC−20 500 / Tape & Reel
MC10H117FNR2G
PLLC−20
(Pb−Free)
500 / Tape & Reel
MC10H117L CDIP−16 25 Unit / Rail
MC10H117M SOEIAJ−16 50 Unit / Rail
MC10H117MG SOEIAJ−16
(Pb−Free)
50 Unit / Rail
MC10H117MEL SOEIAJ−16 2000 / Tape & Reel
MC10H117MELG SOEIAJ−16
(Pb−Free)
2000 / Tape & Reel
MC10H117P PDIP−16 25 Unit / Rail
MC10H117PG PDIP−16
(Pb−Free)
25 Unit / Rail
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
P1-P3P4-P6

MC10H117MG

Mfr. #:
Buy MC10H117MG
Manufacturer:
ON Semiconductor
Description:
Logic Gates Dual 2-3-Input OR-AND/OR-AND Invert
Lifecycle:
New from this manufacturer.
Delivery:
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