4
Absolute Maximum Ratings Thermal Information
Supply Voltage, V
DD,
V
HB
-V
HS
(Notes 3, 4) . . . . . . . . -0.3V to 18V
LI and HI Voltages (Note 4) . . . . . . . . . . . . . . . . . . . . . -0.3V to 7.0V
Voltage on LO (Note 4) . . . . . . . . . . . . . . . . . . . -0.3V to V
DD
+0.3V
Voltage on HO (Note 4) . . . . . . . . . . . . . . . V
HS
-0.3V to V
HB
+0.3V
Voltage on HS (Continuous) (Note 4) . . . . . . . . . . . . . . -1V to 110V
Voltage on HB (Note 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +118V
Average Current in V
DD
to HB diode . . . . . . . . . . . . . . . . . . . 100mA
ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 1 (1kV)
Maximum Recommended Operating Conditions
Supply Voltage, V
DD
. . . . . . . . . . . . . . . . . . . . . . . . +9V to 14.0VDC
Voltage on HS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -1V to 100V
Voltage on HS . . . . . . . . . . . . . . .(Repetitive Transient) -5V to 105V
Voltage on HB . . V
HS
+8V to V
HS
+14.0V and V
DD
-1V to V
DD
+100V
HS Slew Rate. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . <50V/ns
Thermal Resistance (Typical)
JA
(°C/W)
JC
(°C/W)
SOIC (Note 5) . . . . . . . . . . . . . . . . . . . 95 N/A
EPSOIC (Note 6) . . . . . . . . . . . . . . . . . 40 3.0
QFN (Note 6) . . . . . . . . . . . . . . . . . . . . 37 6.5
DFN (Note 6) . . . . . . . . . . . . . . . . . . . . 40 3.0
Max Power Dissipation at 25
o
C in Free Air (SOIC, Note 5) . . . . 1.3W
Max Power Dissipation at 25
o
C in Free Air (EPSOIC, Note 6). . 3.1W
Max Power Dissipation at 25
o
C in Free Air (QFN, Note 6). . . . . 3.3W
Storage Temperature Range . . . . . . . . . . . . . . . . . . . -65°C to 150°C
Junction Temperature Range. . . . . . . . . . . . . . . . . . . -55°C to 150°C
Lead Temperature (Soldering 10s - SOIC Lead Tips Only) . . 300°C
For Recommended soldering conditions see Tech Brief TB389.
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the recommended operating conditions of this specification is not implied.
NOTES:
3. The HIP2101 is capable of derated operation at supply voltages exceeding 14V. Figure 16 shows the high-side voltage derating curve for this
mode of operation.
4. All voltages referenced to V
SS
unless otherwise specified.
5.
JA
is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
6.
JA
is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features.
JC,
the
“case temp” is measured at the center of the exposed metal pad on the package underside. See Tech Brief TB379.
Electrical Specifications V
DD
= V
HB
= 12V, V
SS
= V
HS
= 0V, No Load on LO or HO, Unless Otherwise Specified
PARAMETERS SYMBOL TEST CONDITIONS
T
J
= 25°C
T
J
= -40°C TO
125°C
UNITSMIN TYP MAX MIN MAX
SUPPLY CURRENTS
V
DD
Quiescent Current I
DD
LI = HI = 0V - 0.3 0.45 - 0.6 mA
V
DD
Operating Current I
DDO
f = 500kHz - 1.7 3.0 - 3.4 mA
Total HB Quiescent Current I
HB
LI = HI = 0V - 0.1 0.15 - 0.2 mA
Total HB Operating Current I
HBO
f = 500kHz - 1.5 2.5 - 3 mA
HB to V
SS
Current, Quiescent I
HBS
V
HS
= V
HB
= 114V - 0.05 1.5 - 10 A
HB to V
SS
Current, Operating I
HBSO
f = 500kHz - 0.7 - - - mA
INPUT PINS
Low Level Input Voltage Threshold V
IL
0.8 1.65 - 0.8 - V
High Level Input Voltage Threshold V
IH
- 1.65 2.2 - 2.2 V
Input Pulldown Resistance R
I
- 200 - 100 500 k
UNDER VOLTAGE PROTECTION
V
DD
Rising Threshold V
DDR
7 7.3 7.8 6.5 8 V
V
DD
Threshold Hysteresis V
DDH
-0.5---V
HB Rising Threshold V
HBR
6.5 6.9 7.5 6 8 V
HB Threshold Hysteresis V
HBH
-0.4---V
HIP2101
5
BOOT STRAP DIODE
Low-Current Forward Voltage V
DL
I
VDD-HB
= 100A - 0.45 0.70 - 0.7 V
High-Current Forward Voltage V
DH
I
VDD-HB
= 100mA - 0.7 0.92 - 1 V
Dynamic Resistance R
D
I
VDD-HB
= 100mA - 0.8 1 - 1.5
LO GATE DRIVER
Low Level Output Voltage V
OLL
I
LO
= 100mA - 0.25 0.3 - 0.4 V
High Level Output Voltage V
OHL
I
LO
= -100mA, V
OHL
= V
DD
-V
LO
- 0.25 0.3 - 0.4 V
Peak Pullup Current I
OHL
V
LO
= 0V - 2 - - - A
Peak Pulldown Current I
OLL
V
LO
= 12V - 2 - - - A
HO GATE DRIVER
Low Level Output Voltage V
OLH
I
HO
= 100mA - 0.25 0.3 - 0.4 V
High Level Output Voltage V
OHH
I
HO
= -100mA, V
OHH
= V
HB
-V
HO
- 0.25 0.3 - 0.4 V
Peak Pullup Current I
OHH
V
HO
= 0V - 2 - - - A
Peak Pulldown Current I
OLH
V
HO
= 12V - 2 - - - A
Electrical Specifications V
DD
= V
HB
= 12V, V
SS
= V
HS
= 0V, No Load on LO or HO, Unless Otherwise Specified (Continued)
PARAMETERS SYMBOL TEST CONDITIONS
T
J
= 25°C
T
J
= -40°C TO
125°C
UNITSMIN TYP MAX MIN MAX
Switching Specifications V
DD
= V
HB
= 12V, V
SS
= V
HS
= 0V, No Load on LO or HO, Unless Otherwise Specified
PARAMETERS SYMBOL
TEST
CONDITIONS
T
J
= 25°C
T
J
= -40°C
TO 125°C
UNITSMIN TYP MAX MIN MAX
Lower Turn-Off Propagation Delay (LI Falling to LO Falling) t
LPHL
- 25 43 - 56 ns
Upper Turn-Off Propagation Delay (HI Falling to HO Falling) t
HPHL
- 25 43 - 56 ns
Lower Turn-On Propagation Delay (LI Rising to LO Rising) t
LPLH
- 25 43 - 56 ns
Upper Turn-On Propagation Delay (HI Rising to HO Rising) t
HPLH
- 25 43 - 56 ns
Delay Matching: Lower Turn-On and Upper Turn-Off t
MON
-213-16ns
Delay Matching: Lower Turn-Off and Upper Turn-On t
MOFF
-213-16ns
Either Output Rise/Fall Time t
RC,
t
FC
C
L
= 1000pF - 10 - - - ns
Either Output Rise/Fall Time (3V to 9V) t
R,
t
F
C
L
= 0.1F - 0.5 0.6 - 0.8 us
Either Output Rise Time Driving DMOS t
RD
C
L
= IRFR120 - 20 - - - ns
Either Output Fall Time Driving DMOS t
FD
C
L
= IRFR120 - 10 - - - ns
Minimum Input Pulse Width that Changes the Output t
PW
----50ns
Bootstrap Diode Turn-On or Turn-Off Time t
BS
-10- - - ns
HIP2101
6
Timing Diagrams
Pin Descriptions
SYMBOL DESCRIPTION
V
DD
Positive Supply to lower gate drivers. De-couple this pin to V
SS
. Bootstrap diode connected to HB.
HB High-Side Bootstrap supply. External bootstrap capacitor is required. Connect positive side of bootstrap capacitor to this pin.
Bootstrap diode is on-chip.
HO High-Side Output. Connect to gate of High-Side power MOSFET.
HS High-Side Source connection. Connect to source of High-Side power MOSFET. Connect negative side of bootstrap capacitor to
this pin.
HI High-Side input.
LI Low-Side input.
V
SS
Chip negative supply, generally will be ground.
LO Low-Side Output. Connect to gate of Low-Side power MOSFET.
EPAD Exposed pad. Connect to ground or float. The EPAD is electrically isolated from all other pins.
FIGURE 3.
FIGURE 4.
t
HPLH
,
t
LPLH
t
HPHL
,
t
LPHL
HI,
LI
HO,
LO
t
MON
t
MOFF
LI
HI
LO
HO
Typical Performance Curves
FIGURE 5A.
FIGURE 5B.
FIGURE 5. OPERATING CURRENT vs FREQUENCY
4.000
3.500
3.000
2.500
2.000
1.500
1.000
0.500
0.000
10 30 50 70 200 400 600 800 1000
I
DDO
(mA)
90
150°C
FREQUENCY (kHz)
125°C
25°C
-40°C
3.500
3.000
2.500
2.000
1.500
1.000
0.500
0.000
10 30 50 70 200 400 600 800 1000
I
HBO
(mA)
FREQUENCY (kHz)
90
150°C, 125°C
25°C
-40°C
HIP2101

HIP2101EIBZT

Mfr. #:
Manufacturer:
Renesas / Intersil
Description:
Gate Drivers 100V H-BRDG DRVR 8LD EP
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
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