ZXCL SERIES
Document number: DS33439 Rev. 10 - 3
November 2015
© Diodes Incorporated
Not Recommended for New Design:
USE:
- ZXCLxx0E5TA: AP2121AK-x.xTRG1
- ZXCLxx0H5TA: AP7115-xxSEG-7 or AP2125KS-X.XTRG1
- ZXCL5213VxxH5TA: No Alternative
Application Information (cont.)
Power Dissipation
The maximum allowable power dissipation of the device for
normal operation (P
MAX
), is a function of the package junction
to ambient thermal resistance (θ
JA
), maximum junction
temperature (T
JMAX
), and ambient temperature (T
AMB
),
according to the expression:
P
MAX
= (T
JMAX
– T
AMB
) / θ
JA
The maximum output current (I
MAX
) at a given value of Input
voltage (V
IN
) and output voltage (V
OUT
) is then given by:
I
MAX
= P
MAX
/ (V
IN
- V
OUT
)
The value of qja is strongly dependent upon the type of PC
board used. Using the SC70 package it will range from
approximately 280°C/W for a multi-layer board to around
450°C/W for a single sided board. It will range from 180°C/W
to 300°C/W for the SOT25 package. To avoid entering the
thermal shutdown state, Tjmax should be assumed to be
125°C and Imax less than the overcurrent limit, (I
OLIM
). Power
derating for the SC70 and SOT25 packages is shown in the
following graph.
TEMPERATURE (°C)
Derating Curve
-40 -20 0 20 40 60 80 100
500
300
200
100
0
MAX POWER DISSIPATION (mW)
SOT25
SC70-5/SOT353
Capacitor Selection and Regulator Stability
The device is designed to operate with all types of output
capacitor, including tantalum and low ESR ceramic. For
stability over the full operating range from no load to
maximum load, an output capacitor with a minimum value of
1μF is recommended, although this can be increased without
limit to improve load transient performance. Higher values of
output capacitor will also reduce output noise. Capacitors with
ESR less than 0.5V are recommended for best results.
The dielectric of the ceramic capacitance is an important
consideration for the ZXCL Series operation over
temperature. Zetex recommends minimum dielectric
specification of X7R for the input and output capacitors. For
example a ceramic capacitor with X7R dielectric will lose 20%
of its capacitance over a -40°C to +85°C temperature range,
whereas a capacitor with a Y5V dielectric loses 80% of its
capacitance at -40°C and 75% at +85°C.
An input capacitor of 1µF (ceramic or tantalum) is
recommended to filter supply noise at the device input and
will improve ripple rejection.
The input and output capacitors should be positioned close to
the device, and a ground plane board layout should be used
to minimise the effects of parasitic track resistance.
Dropout Voltage
The output pass transistor is a large PMOS device, which
acts like a resistor when the regulator enters the dropout
region. The dropout voltage is therefore proportional to output
current as shown in the typical characteristics.
Ground Current
The use of a PMOS device ensures a low value of ground
current under all conditions including dropout, start-up and
maximum load.
Power Supply Rejection and Load Transient
Response
Line and Load transient response graphs are shown in the
typical characteristics.
These show both the DC and dynamic shift in the output
voltage with step changes of input voltage and load current,
and how this is affected by the output capacitor.
If improved transient response is required, then an output
capacitor with lower ESR value should be used. Larger
capacitors will reduce over/undershoot, but will increase the
settling time. Best results are obtained using a ground plane
layout to minimise board parasitics.
