Electrical data L2293Q
4/13 Doc ID 14899 Rev 3
1.3 Thermal data
Figure 2. Typical minimum logic supply voltage vs junction temperature
Table 3. Thermal data
Symbol Parameter Value Unit
R
th(JA)
Thermal resistance junction-ambient max.
(1)
1. Mounted on a double-layer FR4 PCB with a dissipating copper surface of 0.5 cm
2
on the top side plus
6 cm
2
ground layer connected through 18 via holes (9 below the IC).
42 °C/W
Tj
[°C]
VSS_min
[V]
0-10-20
2.7
2.8
L2293Q Pin connection
Doc ID 14899 Rev 3 5/13
2 Pin connection
Figure 2. Pin connection (top view)
Note: NC
(1)
These NC pins are connected to the exposed PAD.
The exposed PAD must be connected to GND pins.
NC
(2)
These NC pins can be connected to GND pins and exposed PAD.
Figure 3. Recommended PCB layout for R
th(JA)
optimization
BOTTOM LAYER
BOTTOM LAYER
(connected to GND)
(connected to GND)
GND pins
VIA holes
TOP LAYER
TOP LAYER
(connected to GND)
(connected to GND)
L2293Q
L2293Q
Pin connection L2293Q
6/13 Doc ID 14899 Rev 3
Table 4. Pin description
Pin n° Name Type Function
1, 18, 19, 20,
21, 22, 23
NC Not connected
2, 3, 4, 5, 6, 7, NC Pins connected to the exposed PAD
8, 9, 17, 24, 28,
32
GND Ground
10 OUTPUT2 O Output 2
11 INPUT2 I Input 2
12, 13 V
S
Supply voltage for the power output stages. A non-inductive
100 nF capacitor must be connected between these pins and
ground.
14 ENABLE2 I
Enable 2 input, the LOW state disables the Output 3 and
Output 4.
15 INPUT3 I Input 3
16 OUTPUT3 O Output 3
25 OUTPUT4 O Output 4
26 INPUT4 I Input 4
27 V
SS
Supply voltage for the logic blocks. A 100 nF capacitor must
be connected between this pin and ground.
29 ENABLE1 I
Enable 1 input, the LOW state disables the output 1 and
Output 2.
30 INPUT1 I Input 1
31 OUTPUT1 O Output 1

L2293Q

Mfr. #:
Manufacturer:
STMicroelectronics
Description:
Gate Drivers Push-pull 4 channel driver with diodes
Lifecycle:
New from this manufacturer.
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