amount of capacitance to GND_. The four on
MOSFETs also have capacitance to ground that,
together with the series resistance, forms a lowpass fil-
ter. All of these capacitances are distributed evenly
along the series resistance, so they act as a transmis-
sion line rather than a simple R-C filter. This helps to
explain the exceptional 350MHz bandwidth when the
switches are on.
Typical attenuation in 50Ω systems is -2.5dB and is
reasonably flat up to 300MHz. Higher-impedance cir-
cuits show even lower attenuation (and vice versa), but
slightly lower bandwidth due to the increased effect of
the internal and external capacitance and the switch’s
internal resistance.
The MAX4565/MAX4566/MAX4567 are optimized for
±5V operation. Using lower supply voltages or a single
supply increases switching time, increases on-resis-
tance (and therefore on-state attenuation), and increas-
es nonlinearity.
Switch Off Condition
When the switch is off, MOSFETs N1, N2, P1, and P2
are off and MOSFET N3 is on. The signal path is
through the off-capacitances of the series MOSFETs,
but it is shunted to ground by N3. This forms a high-
pass filter whose exact characteristics are dependent
on the source and load impedances. In 50Ω systems,
and below 10MHz, the attenuation can exceed 80dB.
This value decreases with increasing frequency and
increasing circuit impedances. External capacitance
and board layout have a major role in determining over-
all performance.
__________Applications Information
Power-Supply Considerations
Overview
The MAX4565/MAX4566/MAX4567 construction is typi-
cal of most CMOS analog switches. It has three supply
pins: V+, V-, and GND. V+ and V- are used to drive the
internal CMOS switches and set the limits of the analog
voltage on any switch. Reverse ESD protection diodes
are internally connected between each analog signal
pin and both V+ and V-. If the voltage on any pin
exceeds V+ or V-, one of these diodes will conduct.
During normal operation these reverse-biased ESD
diodes leak, forming the only current drawn from V-.
Virtually all the analog leakage current is through the
ESD diodes. Although the ESD diodes on a given sig-
nal pin are identical, and therefore fairly well balanced,
they are reverse biased differently. Each is biased by
either V+ or V- and the analog signal. This means their
leakages vary as the signal varies. The
difference
in the
two diode leakages from the signal path to the V+ and
V- pins constitutes the analog signal-path leakage cur-
rent. All analog leakage current flows to the supply ter-
minals, not to the other switch terminal. This explains
how both sides of a given switch can show leakage
currents of either the same or opposite polarity.
There is no connection between the analog signal
paths and GND. The analog signal paths consist of an
N-channel and P-channel MOSFET with their sources
and drains paralleled and their gates driven out of
phase with V+ and V- by the logic-level translators.
V+ and GND power the internal logic and logic-level
translators, and set the input logic thresholds. The
logic-level translators convert the logic levels to
switched V+ and V- signals to drive the gates of the
analog switches. This drive signal is the only connec-
tion between the logic supplies and the analog sup-
plies. All pins have ESD protection to V+ and to V-.
Increasing V- has no effect on the logic-level thresh-
olds, but it does increase the drive to the P-channel
switches, reducing their on-resistance. V- also sets the
negative limit of the analog signal voltage.
The logic-level thresholds are CMOS and TTL compati-
ble when V+ is +5V. As V+ is raised, the threshold
increases slightly; when V+ reaches +12V, the level
threshold is about 3.1V, which is above the TTL output
high-level minimum of 2.8V, but still compatible with
CMOS outputs.
Bipolar-Supply Operation
The MAX4565/MAX4566/MAX4567 operate with bipolar
supplies between ±2.7V and ±6V. The V+ and V- sup-
plies need not be symmetrical, but their sum cannot
exceed the absolute maximum rating of 13.0V. Do not
connect the MAX4565/MAX4566/MAX4567 V+ pin to
+3V and connect the logic-level input pins to TTL
logic-level signals. TTL logic-level outputs can
exceed the absolute maximum ratings, causing
damage to the part and/or external circuits.
CAUTION:
The absolute maximum V+ to V- differential
voltage is 13.0V. Typical “±6-Volt” or “12-Volt”
supplies with ±10% tolerances can be as high
as 13.2V. This voltage can damage the
MAX4565/MAX4566/MAX4567. Even ±5% toler-
ance supplies may have overshoot or noise
spikes that exceed 13.0V.
MAX4565/MAX4566/MAX4567
Quad/Dual, Low-Voltage,
Bidirectional RF/Video Switches
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