_______________Detailed Description
Reset Output
A microprocessor’s (µP’s) reset input starts the µP in a
known state. These µP supervisory circuits assert reset
to prevent code-execution errors during power-up,
power-down, or brownout conditions. They also provide
a reset timeout delay that is pin programmable to 1ms
(max), 20ms (min), or 100ms (min). This feature allows
flexibility in designing bar-code scanners, hand-held
devices, and other applications that require quick or
nonstandard power-up times.
The MAX821’s RESET output is guaranteed to be a
logic low for V
CC
> 1V. Once V
CC
exceeds the reset
threshold, an internal timer keeps RESET low for the
reset timeout period, as determined by the Set Reset
Timeout (SRT) input. See the Setting the Reset Timeout
Delay section.
If a brownout condition occurs (V
CC
dips below the
reset threshold), RESET goes low. Any time V
CC
goes
below the reset threshold, the internal timer resets to
zero, and RESET goes low. The internal timer begins
counting after V
CC
returns above the reset threshold,
and RESET remains low for the reset timeout period.
The MAX822 has an active-high RESET output that is
the inverse of the MAX821’s RESET output.
Setting the Reset Timeout Delay
Use the three-level Set Reset Timeout (SRT) input to set
the reset timeout delay. Connect SRT to GND for a 1ms
(max) delay; connect it to V
CC
for a 20ms (min) delay;
or leave it unconnected for a 100ms (min) delay.
If you choose to drive the SRT pin with an external sig-
nal, make sure the signal source can charge/discharge
the capacitance on SRT quickly enough (<500µs) to
avert an unintended reset timeout delay.
To ensure proper operation when selecting the 100ms
timeout (SRT = unconnected), minimize capacitive
loading on the SRT pin (< 200pF). Excessive capacitive
loading can select an unintended faster timeout mode.
Reset Threshold Accuracy
The MAX821/MAX822 are designed to meet their worst-
case specifications over their entire operating tempera-
ture range. Choose a reset threshold guaranteed to
assert at a voltage below the power supply’s regulation
range and above the minimum specified operating volt-
age range for the system’s ICs.
__________Applications Information
Negative-Going V
CC
Transients
While designed to issue a reset to the microprocessor
(µP) during power-up, power-down, and brownout con-
ditions, the MAX821/MAX822 are relatively immune to
short-duration, negative-going V
CC
transients (glitches).
Figure 1 shows the maximum transient duration vs. reset
comparator overdrive for which the MAX821/MAX822
typically do not generate a reset pulse. This graph was
generated using a negative-going pulse applied to V
CC
,
starting above the actual reset threshold and ending
below it by the magnitude indicated (reset comparator
overdrive). The graph indicates the typical maximum
pulse width a negative-going V
CC
transient may have
without causing a reset pulse to be issued. As the mag-
nitude of the transient increases (goes farther below the
reset threshold), the maximum allowable pulse width
decreases. Typically, for the MAX821/MAX822, a V
CC
transient that goes 100mV below the reset threshold and
lasts 12µs or less will not cause a reset pulse to be
issued. A 0.1µF capacitor mounted as close as possible
to V
CC
can provide additional transient immunity, if
desired.
MAX821/MAX822
4-Pin µP Voltage Monitors with Pin-Selectable
Power-On Reset Timeout Delay
_______________________________________________________________________________________ 5
