LTC4056-4.2
9
405642f
APPLICATIO S I FOR ATIO
WUU
U
Termination Timer
The programmable timer is used to terminate the charge
cycle. The timer duration is programmed by an external
capacitor at the TIMER/SHDN pin and the external PROG
resistor. The total charge time is:
Time(Hours) = 1.935 • R
PROG
(k) • C
TIMER
(µF) or
C
TIMER
(µF) = Time(Hours)/1.935 • R
PROG
(k)
For example, to program a three hour timer with a 600mA
charge current (i.e., R
PROG
= 1.54k), calculate:
CF
TIMER
==µ
3
1 935 1 54
1
.•.
The timer starts when an input voltage greater than the
undervoltage lockout threshold level is applied, a program
resistor is connected to ground and the TIMER/SHDN pin
is allowed to rise above the shutdown threshold. After a
time-out occurs, the charge current stops and the CHRG
output transitions from a strong pull-down to a 12µA pull-
down to indicate charging has stopped. As long as the
input supply remains above V
UVLOD
and the battery volt-
age remains above V
RECHRG
the charger will remain in this
standby mode.
If the battery voltage remains below V
TRIKL
for 25% of the
programmed time, the charger will enter standby mode.
Furthermore, if the battery voltage is above the recharge
threshold (V
RECHRG
is typically 4.05V) at the beginning of
a charge cycle or if a falling battery voltage triggers a
recharge cycle (following a previous time-out), the charge
cycle will be shortened to 50% of the programmed time.
This feature reduces the charge time for batteries that are
near full capacity. Connecting the TIMER/SHDN pin to V
CC
disables the timer function.
Manual Shutdown
Pulling the TIMER/SHDN pin below V
MSDT
– V
MSHYS
(typically 0.745V) will put the charger into shutdown
mode and reset the timer. In this mode, the LTC4056
consumes 40µA of supply current and drains a negligible
leakage current from the battery (I
BMS
).
A 7µA current source pulls up on the TIMER/SHDN pin
while in shutdown to ensure that the IC will start up once
the TIMER/SHDN pin is released. Given the low magnitude
of this current, it is a simple matter for an external open-
drain (or open-collector) output to pull the TIMER/SHDN
pin to ground for shutdown and release the pin for normal
operation.
Sleep Mode
When the input supply is disconnected, the IC enters the
sleep mode. In this mode, the battery drain current (I
BSL
)
is a negligible leakage current, allowing the battery to
remain connected to the charger for an extended period of
time without discharging the battery. The leakage current
is due to the reverse-biased B-E junction of the external
PNP transistor. Furthermore, the CHRG pin assumes a
high impedance state.
CHRG Status Output Pin
When the charge cycle starts, the CHRG pin is pulled to
ground by an internal N-channel MOSFET capable of
driving an LED. When the charge cycle ends, the strong
pull-down transitions to a 12µA pull-down on the CHRG
pin as long as the input supply remains above the UVLO
threshold (V
UVLOD
) and the battery voltage remains above
V
RECHRG
. If the input supply falls below V
UVLOD
, the CHRG
pin assumes a high impedance state. Figure 1 shows a
flow diagram for a typical charge cycle. This diagram
indicates the status of the CHRG pin in each charger state.
A microprocessor can be used to distinguish the three
states of the CHRG pin (see Figure 2). To detect whether
the LTC4056 is in trickle charge, charge, or short charge
mode (i.e., strong pull-down), force the digital output pin
(OUT) high and measure the voltage at the CHRG pin. The
internal N-channel MOSFET will pull the pin voltage low
even with the 2k pull-up resistor. Once the charge cycle
terminates, the strong pull-down transitions to a 12µA
pull-down. The IN pin will then be pulled high by the 2k
pull-up resistor. To determine whether sufficient input
voltage is present for charging (i.e., high impedance), the
OUT pin should be forced to a high impedance state. If
V
CC
␣>␣V
UVLOI
then the 12µA CHRG pull-down will pull the
IN pin low through the 800k resistor; otherwise, the 800k
resistor will pull the IN pin high, indicating that
V
CC
␣<␣V
UVLOD
.
